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SPIE 2020 – ASML EUV and Inspection Update

SPIE 2020 – ASML EUV and Inspection Update
by Scotten Jones on 04-20-2020 at 10:00 am

0.33 NA EUV systems for HVM Ron Schuurhuis Page 02

I couldn’t attend the SPIE Advanced Lithography Conference this year for personal reasons, but last week Mike Lercel of ASML was nice enough to walk me through the major ASML presentations from the conference.

Introduction
In late 2018, Samsung and TSMC introduced 7nm foundry logic processes with 5 to 7 EUV layers, throughout … Read More


Design IP Revenue Grew 5.2% in 2019, Good News in Declining Semi Market

Design IP Revenue Grew 5.2% in 2019, Good News in Declining Semi Market
by Eric Esteve on 04-20-2020 at 6:00 am

IP Category 2018 2019

Good news is good to hear, particularly these days! The behavior of the Design IP market in 2019 is extremely positive, when the semiconductor market has seen a decline worst than in 2009 (economy crisis) or 2001 (internet bubble collapse). Analysis this 5.2% growth in detail will help to understand the future of the IP market, as… Read More


Short vs Long Term Covid19 Impact

Short vs Long Term Covid19 Impact
by Robert Maire on 04-19-2020 at 10:00 am

Covid Semiconductor

-Short term Covid19 impact is primarily logistics related
-Longer term impact is more systemic/demand driven
-Impact will wind through supply chain over several qtrs
-Other issues, such as trade, remain an overhang

Short term versus long term in the semiconductor industry
The stocks declines over the last months seem to indicate… Read More


Online Class: Advanced CMOS Technology 2020 (The 10/7/5 NM Nodes)

Online Class: Advanced CMOS Technology 2020 (The 10/7/5 NM Nodes)
by Daniel Nenni on 04-12-2020 at 9:00 am

3D Finet Model

Our friends at Threshold Systems have a new ONLINE class that may be of interest to you. It’s an updated version of the Advanced CMOS Technology class held last February. This is normally a classroom affair but to accommodate the recent COVID-19 travel restrictions it is being offered virtually.

As part of the previous class we did… Read More


Why I’m Lowering Semiconductor Equipment Revenue Growth to -6.9% in 2020

Why I’m Lowering Semiconductor Equipment Revenue Growth to -6.9% in 2020
by Robert Castellano on 04-09-2020 at 10:00 am

Applied Materials Lam lower C2

Because of significant $4 billion in equipment pull-ins in Q4 from sales in Asia, I was reducing my semiconductor wafer front-end (WFE) equipment revenue growth from an earlier +5% to 0% in 2020. Now, based on CORVID-19, I am further reducing revenue growth to -6.9%.

Chart 1 also shows the cyclical nature of semiconductors and semiconductor… Read More


UPDATE: Everybody Loves a Winner

UPDATE: Everybody Loves a Winner
by Mike Gianfagna on 04-05-2020 at 9:00 am

Picture1 4

Building a successful startup is hard, very hard. Creating a new category along the way is even more difficult. Those that succeed at both endeavors are quite rare. This is why an upcoming ESD Alliance event is a must-see in my view. The event is entitled “Jim Hogan and Methodics’ Simon Butler on Bootstrapping a Startup to ProfitabilityRead More


Filling the ASIC Void – Part 2

Filling the ASIC Void – Part 2
by Mike Gianfagna on 04-03-2020 at 6:00 am

Screen Shot 2020 03 24 at 5.00.49 PM

I concluded my last post on the topic with an inventory of the key attributes needed to fill the ASIC void created by the relentless consolidation in semiconductors. There were five items, as follows:

  1. Design and manufacturing expertise in a market that requires custom chips
  2. Differentiating IP and the skills to integrate it into
Read More

Newsflash Chip Equip Blockade Back on!

Newsflash Chip Equip Blockade Back on!
by Robert Maire on 03-29-2020 at 2:00 pm

US China Blockade


Blocking chip sales to Huawei back on front burner
Covid19 & China Trade are equally bad
Long lived Uncertainty could “plague” industry sales going forward
Political Predictability worse than Disease Predictability

Reuters broke a story today that the proposed licensing of chip equipment to prevent “bad… Read More


Filling the ASIC Void – Part 1

Filling the ASIC Void – Part 1
by Mike Gianfagna on 03-27-2020 at 6:00 am

shutterstock 235025512

It started slowly at first.  Then it began picking up steam. I’m referring to consolidation in the semiconductor sector. I had a front-row seat for what consolidation did to the ASIC part of semiconductor and that is the topic of this discussion. I was the VP of marketing at eSilicon, the company that invented the fabless ASIC model.… Read More


COVID-19 Chip Cycle – How deep, long and what shape?

COVID-19 Chip Cycle – How deep, long and what shape?
by Robert Maire on 03-26-2020 at 10:00 am

Covid 19 Semiconductors SemiWiki 1

It is a demand driven downturn – harder to predict
It may not be “business as usual” after this virus
What systemic changes could the industry face?

Trying to figure out another cycle-driven by inorganic catalyst

Investors and industry participants in the semiconductor industry who are used to normal cyclical… Read More