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TSMC 2011 Open Innovation Platform Ecosystem Forum Trip Report

TSMC 2011 Open Innovation Platform Ecosystem Forum Trip Report
by Daniel Nenni on 10-23-2011 at 3:00 pm

The TSMC OIP conference was Monday and Tuesday of last week. You have probably NOT read about it since it was invitation only and press was not invited. Slides were not made available (except for Mentor), no photos or video were allowed, it was a very private affair. Given that, I won’t be able to go into great detail but I will give you… Read More


Mentor at the TSMC Open Innovation Platform Ecosystem Forum

Mentor at the TSMC Open Innovation Platform Ecosystem Forum
by Daniel Payne on 10-17-2011 at 3:14 pm

EDA companies and foundries must closely collaborate in order to deliver IC tool flows that work without surprises at the 40nm and 28nm nodes.

Tomorrow in San Jose
you can attend this 4th annual event hosted by TSMC along with Mentor Graphics and other EDA and IP companies.

Here are some of the topics that will interest IC designers… Read More


TSMC Gets Fooled Again!

TSMC Gets Fooled Again!
by Daniel Nenni on 10-16-2011 at 2:51 pm

If you follow the SemiWiki Twitter feed you may have noticed that The Motley Fool (Seth Jayson) did three more articles on TSMC financials. The first Foolish article was blogged on SemiWiki as “TSMC Financial Status and OIP Update”.

The next three Fool Hardy articles look at cash flow (the cash moving in and out of a business), accounts… Read More


Samsung versus Apple and TSMC!

Samsung versus Apple and TSMC!
by Daniel Nenni on 09-28-2011 at 6:56 am

Apple will purchase close to eightBILLION dollars in parts from Samsung for the iSeries of products this year alone, making Apple Samsung’s largest customer. Samsung is also Apple’s largest competitor and TSMC’s most viable competitive foundry threat so it was no surprise to see Apple and TSMC team up on the next generations of… Read More


TSMC and Dr. Morris Chang!

TSMC and Dr. Morris Chang!
by Daniel Nenni on 09-05-2011 at 6:14 pm

While I was in Taiwan last month battling a Super Typhoon, Morris Chang was in Silicon Valley picking up his IEEE Medal of Honor. Gordon Moore, Andrew Grove, and Robert Noyce all have medals. The other winners, including 10 Nobel prize recipients, are listed HERE. An updated wiki on Dr. Morris Chang is located HERE.

The 12+ hour plane… Read More


Semiconductor Yield @ 28nm HKMG!

Semiconductor Yield @ 28nm HKMG!
by Daniel Nenni on 08-28-2011 at 4:00 pm

Whether you use a gate-first or gate-last High-k Metal Gate implementation, yield will be your #1 concern at 28nm, which makes variation analysis and verification a big challenge. One of the consulting projects I have been working on with the foundries and top fabless semiconductor companies is High-Sigma Monte Carlo (HSMC) … Read More


TSMC 28nm and 20nm Update!

TSMC 28nm and 20nm Update!
by Daniel Nenni on 08-15-2011 at 3:00 pm

First, I would like to congratulate Samsung on their first 20nm test chip press release. Some will say it is a foundry rookie mistake since real foundries do not discuss test chip information openly. I like it because it tells us that Samsung is 6-9 months BEHIND the number one foundry in the world on the 20nm (gate-last HKMG) process… Read More


TSMC Financial Status Plus OIP Update!

TSMC Financial Status Plus OIP Update!
by Daniel Nenni on 07-05-2011 at 8:00 am

Interesting notes from my most recent Taiwan trip: Taiwan unemployment is at a record low. Scooters once again fill the streets of Hsinchu! TSMC will be passing out record bonuses to a record amount of people. TSMC Fab expansions are ahead of schedule. The new Fab 15 in Taichung went up amazingly fast with equipment moving in later… Read More


TSMC Versus Intel: The Race to Semiconductors in 3D!

TSMC Versus Intel: The Race to Semiconductors in 3D!
by Daniel Nenni on 06-26-2011 at 4:00 pm

While Intel is doing victory laps in the race to a 3D transistor (FinFet) @ 22nm, TSMC is in production with 3D IC technology. A 3D IC is a chip in which two or more layers of active electronic components are integrated both vertically and horizontally into a single circuit. The question is which 3D race is more important to the semiconductor… Read More


New TSMC 28nm Design Ecosystem!

New TSMC 28nm Design Ecosystem!
by Daniel Nenni on 05-28-2011 at 9:23 pm

TSMC rolled out the new reference flows for 28nm design as part of the Open Innovation Platform. The biggest surprise (to me) is that Cadence is STILL in the TSMC reference flows!

The updated TSMC OIP wiki is here, the Reference Flow 12.0 wiki can be found here, the AMS 2.0 reference flow wiki is here, and the official TSMC PR is here. Read More