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Achronix Logo SemiWiki
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Achronix is Driving the Fourth FPGA Wave

Achronix is Driving the Fourth FPGA Wave
by Mike Gianfagna on 11-09-2020 at 8:00 am

Achronix and the Fourth FPGA Wave

Technology typically evolves in waves. Sometimes it’s referred to as a “revolution” or an “age”. The industrial revolution and the information age are examples. These kinds of categorizations help to clarify the impact of innovation in ways that are relevant to everyone – you can’t look away if the world is changing around you.… Read More


Webinar: Maximize Performance Using FPGAs with PCIe Gen5 Interfaces

Webinar: Maximize Performance Using FPGAs with PCIe Gen5 Interfaces
by Mike Gianfagna on 09-01-2020 at 10:00 am

Maximize Maximize Performance Using FPGAs with PCIe Gen5 Interfaces

FPGAs are a popular method to implement hardware accelerators for applications such as AI/ML, SmartNICs and storage acceleration. PCIe Gen5 is a high bandwidth communication protocol that is a key enabler for this class of applications. Putting all this together presents significant demands on the FPGA for performance and … Read More


Achronix Blog Roundup!

Achronix Blog Roundup!
by Daniel Nenni on 07-09-2020 at 10:00 am

Achronix Speedcore

Blogging is not an easy thing to do. It takes time, patience, commitment, and creativity. SemiWiki brought blogging to the semiconductor industry and many companies have followed. Very few have been successful with personal or corporate blogs but as a premier semiconductor blogger I have developed a proven recipe over the last… Read More


CEO Interview: Robert Blake of Achronix

CEO Interview: Robert Blake of Achronix
by Daniel Nenni on 05-25-2020 at 10:00 am

Robert Blake Achronix CEO SemiWiki

Achronix came to SemiWiki in 2017 and we added a chapter on the history of Achronix in our update version of “Fabless: The Transformation of the Semiconductor Industry”. So yes we know quite a bit about Achronix and the FPGA business so it was a pleasure to do a CEO Q&A with Robert Blake. First lets take a look at his … Read More


Webinar – FPGA Native Block Floating Point for Optimizing AI/ML Workloads

Webinar – FPGA Native Block Floating Point for Optimizing AI/ML Workloads
by Tom Simon on 02-25-2020 at 10:00 am

block float example

Block floating point (BFP) has been around for a while but is just now starting to be seen as a very useful technique for performing machine learning operations. It’s worth pointing out up front that bfloat is not the same thing. BFP combines the efficiency of fixed point operations and also offers the dynamic range of full floating… Read More


Insights from the Next FPGA Platform Event

Insights from the Next FPGA Platform Event
by Daniel Nenni on 02-11-2020 at 10:00 am

The Next FPGA Platform SemiWiki

Unfortunately, I missed this event since I was in China. Fortunately, Manoj Roge VP Strategic Planning and Business Development at Achronix participated and did a nice write-up. Manoj has more than 20 years of experience in the programable business with Cypress Semiconductor, Xilinx, Altera, and now Achronix so you should definitely… Read More


FPGAs in the 5G Era!

FPGAs in the 5G Era!
by Daniel Nenni on 01-27-2020 at 6:00 am

New Family of FPGAs Speedster7t

FPGAs, today and throughout the history of semiconductors, play a critical role in design enablement and electronic systems. Which is why we included the history of FPGAs in our book “Fabless: The Transformation of the Semiconductor Industry” and added a new chapter in the 2019 edition on the history of Achronix.

In a recent blog… Read More


Network on Chip Brings Big Benefits to FPGAs

Network on Chip Brings Big Benefits to FPGAs
by Tom Simon on 12-19-2019 at 10:00 am

NAPs provide connection to high speed NoC

The conventional thinking about programmable solutions such as FPGAs is that you have to be willing to make a lot of trade-offs for their flexibility. This has certainly been the case in many instances. Even just getting data across the chip can eat up valuable routing resources and add a lot of overhead. These problems are exacerbated… Read More


New Generation of FPGA Based Distributed Accelerator Cards Offer High Performance and Adaptability

New Generation of FPGA Based Distributed Accelerator Cards Offer High Performance and Adaptability
by Tom Simon on 12-05-2019 at 10:00 am

Achronix FPGA used on BittWare Accelerator Card

We have learned from nature that two characteristics are helpful for success, diversity and adaptability. The same has been shown to be true for computing systems. Things have come a long way from when CPU centric computing was the only choice. Much heavy lifting these days is done by GPUs, ASICs, and FPGAs, with CPUs in a support … Read More


Achronix Announces New Accelerator Card at Linley Fall Processor Conference – VectorPath

Achronix Announces New Accelerator Card at Linley Fall Processor Conference – VectorPath
by Randy Smith on 11-04-2019 at 10:00 am

This blog is my second blog from this year’s Linley Fall Processor Conference. The first two blogs focused on edge inference solutions. Achronix’s discussion was much broader than just AI/ML; it was about where FPGA’s have been going and culminated with a product announcement preview. I’ll get to the announcement in a moment, … Read More