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Digital Design Trends – A Cadence Perspective

Digital Design Trends – A Cadence Perspective
by Bernard Murphy on 04-21-2016 at 7:00 am

I talked with Paul Cunningham (VP front-end digital R&D) at CDNLive recently to get a Cadence perspective on digital design trends. He sees needs from traditional semiconductor companies evolving as usual, with disruption here and there from consolidation. But on the system side there is explosion in demand – for wearables,… Read More


Neural Networks Poised to Make Big Changes in Our World

Neural Networks Poised to Make Big Changes in Our World
by Tom Simon on 04-11-2016 at 12:00 pm

Probably the most interesting thing about Neural Networks is how they can be used for complex recognition tasks that we as people can easily perform but we might have a lot of trouble explaining how. One very good example of a problem that Neural Networks can tackle is determining when people are making a fake smile. Intuitively we… Read More


The Importance of Transistor-Level Verification

The Importance of Transistor-Level Verification
by Students@olemiss.edu on 04-10-2016 at 7:00 am

According to the IEEE Std 1012-2012, verification is the acknowledgement that a product is in satisfactory condition by meeting a set of rigorous criteria. [3] Transistor-level verification involves the use of custom libraries and design models to achieve ultimate performance, low power, or layout density. [2] Prediction… Read More


The Most Important Point You May Have Missed at CDNLive 2016!

The Most Important Point You May Have Missed at CDNLive 2016!
by Daniel Nenni on 04-06-2016 at 4:00 am

This was the best keynote lineup I can remember at a user group meeting. All four speakers are visionaries but from very different perspectives. The video of the event will be up later this month but from my first count the word “System(s)” was mentioned 32 times and the underlying message will transform the semiconductor industry… Read More


Analog Design Verification — Traceability is Required

Analog Design Verification — Traceability is Required
by Tom Dillinger on 04-05-2016 at 9:45 am

Digital verification engineers have developed robust, thorough metrics for evaluating design coverage. Numerous tools are available to evaluate testbenches against RTL model descriptions — e.g., confirming that simulation regressions exhaustively exercise signal toggles, RTL statement lines, individual statement… Read More


The Latest in Static Timing Analysis with Variation Modeling

The Latest in Static Timing Analysis with Variation Modeling
by Tom Dillinger on 03-30-2016 at 12:00 pm

In many ways, static timing analysis (STA) is more of an art than a science. Methodologists are faced with addressing complex phenomena that impact circuit delay — e.g., signal crosstalk, dynamic I*R supply voltage drop, temperature inversion, device aging effects, and especially (correlated and uncorrelated) process… Read More


SystemC and Adam’s Law

SystemC and Adam’s Law
by Bernard Murphy on 03-24-2016 at 7:00 am

At DVCon I sat in on a series of talks on using higher-level abstraction for design, then met Adam Sherer to get his perspective on progress in bringing SystemC to the masses (Adam runs simulation-based verification products at Cadence and organized the earlier session). I have to admit I have been a SystemC skeptic (pace Gary Smith)… Read More


Software-Driven Verification and Portable Stimulus

Software-Driven Verification and Portable Stimulus
by Bernard Murphy on 03-15-2016 at 12:00 pm

I was at every single lunch at DVCon, not because the food was that great (it wasn’t bad) but because the topics were all interesting. The Wednesday lunch, hosted by Cadence, was a panel on software-driven verification and portable stimulus, moderated by Frank Schirrmeister (a different role for Frank – he’s usually a panel member… Read More


Cadence is again the best EDA company to work for!

Cadence is again the best EDA company to work for!
by Daniel Nenni on 03-10-2016 at 7:00 am

We wrote about the history of Cadence in preparation for our book “Fabless: The Transformation of the Semiconductor Industry” in 2012. EDA played a key role in enabling the fabless semiconductor revolution and Cadence was right there at the beginning. Famed EETimes editor Richard Goering helped us with the book and the Cadence… Read More


Neural Networks Ready for Embedded Platforms

Neural Networks Ready for Embedded Platforms
by Tom Simon on 02-24-2016 at 7:00 am

If you are not yet familiar with the term Convolutional Neural Networks, or CNN for short, you are certainly bound to become in the year ahead. Using Artificial Intelligence in the form of CNN is on the verge of replacing a large number of computing tasks, especially those involving recognizing things such as sounds, shapes, objects,… Read More