Chiplets: Powering the Next Generation of AI SystemsAI’s rapid expansion is reshaping semiconductor design. The…Read More
Better Automatic Generation of Documentation from RTL CodeOne technical topic I always find intriguing is…Read More
FD-SOI: A Cyber-Resilient Substrate for Secure Automotive ElectronicsThe paper highlights how Fully Depleted Silicon-On-Insulator (FD-SOI)…Read More
ASU Silvaco Device TCAD Workshop: From Fundamentals to ApplicationsThe ASU-Silvaco Device Technology Computer-Aided Design Workshop is…Read More
In the rapidly evolving landscape of AI, stands out as a pioneering force in edge computing. Founded in 2018 and headquartered in Burlingame, California, Quadric is a technology company focused on developing high-performance, energy-efficient processors for AI workloads at the edge devices like smartphones, IoT sensors,… Read More
By Kamal Khan
In today’s semiconductor industry, success hinges not only on innovation but also on discipline in managing complexity. Every system-on-chip (SoC) is built from hundreds of reusable IP blocks—standard cells, memories, interfaces, and analog components. These IPs are the foundation of the design. But if the foundation… Read More
U.S. electronics production has been on an accelerating growth trend over the last ten months. Three-month average change versus a year ago (3/12 change) has increased from 0.4% in October 2024 to 6.2% in August 2025. Japan’s 3/12 change has been positive since November 2024, but has been decelerating for most of 2025, reaching… Read More
In the complex world of semiconductors, reliability, availability, and serviceability (RAS) have become paramount, especially as devices shrink to nanoscale geometries like 2nm. At the recent 2025 TSMC OIP Forum Noam Brousard, VP of Solutions Engineering at proteanTecs, presented “Failure Prevention with Real-Time… Read More
Daniel is joined by Jake Canon, senior business development engineer at Toshiba America Electronic Components. Jake is an enthusiastic contributor to the semiconductor industry and has been working closely with engineers to find new discrete power solutions for a wide variety of cutting-edge applications.
Dan explores the… Read More
VSORA, a pioneering high-tech company, has engineered a novel architecture designed specifically to meet the stringent demands of AI inference—both in datacenters and at the edge. With near-theoretical performance in latency, throughput, and energy efficiency, VSORA’s architecture breaks away from legacy designs optimized… Read More
The semiconductor industry is undergoing a transformative shift with the integration of AI into DRC workflows, as showcased in the Siemens EDA presentation at the 2025 TSMC OIP. Titled “AI-Driven DRC Productivity Optimization,” this initiative, led by Siemens EDA’s David Abercrombie alongside AMD’s… Read More
GPUs have been proposed before to accelerate logic simulation but haven’t quite met the need yet. This is a new attempt based on emulating emulator flows. Paul Cunningham (GM, Verification at Cadence), Raúl Camposano (Silicon Catalyst, entrepreneur, former Synopsys CTO and lecturer at Stanford, EE292A) and I continue our series… Read More
One of the more in interesting companies I met at the AI Infra Summit was a company known to me for some time. The most interesting part was the chip they are in the process of taping out; It is a high-performance, ultra-low-power AI processor purpose-built for edge computing. It is claimed to deliver “the processing muscle … Read More
There is always a lot of buzz about advanced AI workloads at trade shows. How to train them and how to run them. Advanced chip and multi-die designs are how AI is brought to life, so it was a perfect fit for discussion at a show. But there is another side of this discussion. Much of the work going on in AI workloads has to do with processing… Read More
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