
Arteris has surpassed 1,000 customer silicon design starts using its interconnect intellectual property, a milestone that highlights an increasingly consequential shift in chip design: moving data efficiently is becoming as important as processing it.
The company’s November 5 announcement accompanies a report, The State of Semiconductor Innovation: Insights from 1,000 Design Starts, examining changes across its customer designs. Its findings point to rising AI adoption, greater enterprise computing activity, and growing architectural complexity. Together, they suggest that the connections between processors, memory, and accelerators deserve more attention in discussions about semiconductor performance.
A network on chip provides the communication infrastructure linking those components. As designs incorporate more specialized processing blocks, the interconnect must accommodate competing demands for bandwidth, latency, power efficiency, and predictable behavior. Adding compute resources delivers limited value if data cannot reach them efficiently.
According to Arteris, Network on Chips represent 10% to 13% of chip and chiplet area in sophisticated designs. That makes interconnect a substantial architectural commitment, with implications for both silicon cost and system performance. Decisions about data movement therefore belong early in development, alongside decisions about computing resources and memory organization.
The most striking change in the company’s dataset is the rise of AI. Designs classified as AI related increased from 4% of Arteris design starts in 2010–2014 to 50% in 2021–2025. These percentages describe Arteris customer activity, rather than the entire semiconductor industry, but they show how dramatically its workload mix has changed.
Why does that matter?
AI architectures depend on repeatedly moving large volumes of information between memory and processing elements. Communication bottlenecks can constrain throughput, while unnecessary transfers consume energy. Interconnect design consequently influences whether additional computing capability translates into useful performance within practical power budgets.
Enterprise computing shows a similarly pronounced shift. Data center, cloud, and high performance computing applications increased from 11% to 43% of Arteris design starts between those periods. The commercial implication is straightforward: customers building expensive computing infrastructure need architectures that keep resources productive. Efficient communication can help support that objective, although the announcement does not quantify resulting customer savings.
Automotive adds another dimension. Arteris says approximately two thirds of its automotive design starts carry a functional safety classification related to ASIL, while nearly half combine that classification with AI capabilities. These figures indicate growing overlap between intelligent processing and safety requirements in the company’s automotive business.
For vehicles and other systems that interact with the physical world, raw performance is only part of the challenge. Designers must also address reliability, safety, and security. The announcement positions Arteris’ interconnect, integration automation, and hardware security assurance portfolio around those intersecting requirements. However, a design’s classification alone does not establish that a finished product has achieved certification.
Arteris also reports a ninefold increase in measured design complexity over the last two years. That is a notable claim, but the release does not explain the measurement methodology. Readers should therefore treat it as a company reported indicator, rather than a standardized measure of industrywide complexity.
The milestone itself requires similar precision. A design start marks development activity; it does not necessarily represent a completed tapeout, a production chip, or commercial success. Nor does the announcement establish revenue per design. Its value lies primarily in demonstrating accumulated adoption and the breadth of architectures using Arteris technology.
For engineering teams, this shifts the question from which processing blocks to select toward how those blocks will share information. For system companies developing custom silicon, it also raises the importance of integration expertise when balancing product differentiation, development schedules, and overall execution risk.
Bottom line: The announcement matters because semiconductor differentiation increasingly depends on how the whole system works together. More cores and accelerators create opportunity, but also more communication and integration challenges. Arteris’ customer history offers evidence that these challenges are becoming central to chip development. The next test is how effectively its technology helps customers turn architectural ambition into efficient, dependable silicon.
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