Tag: arteris

Podcast EP350: The Growing Threat of Hardware Security Breaches and What to do About it with Dr. Andreas Kuehlmann

Podcast EP350: The Growing Threat of Hardware Security Breaches and What to do About it with Dr. Andreas Kuehlmann
by Daniel Nenni on 06-12-2026 at 10:00 am
Categories: Arteris, IP, Security

Daniel is joined by Dr. Andreas Kuehlmann, General Manager of Security Solutions at Arteris. He has over 35 years of experience in semiconductor design, software, and cybersecurity, including roles at IBM Research, UC Berkeley, Cadence, and Synopsys. Previously, he was CEO of Cycuity, which was acquired by Arteris.

Dan explores… Read More

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How llmda.ai Coaxed Me Out of Retirement, an Interview with Kurt Shuler

How llmda.ai Coaxed Me Out of Retirement, an Interview with Kurt Shuler
by Daniel Nenni on 06-12-2026 at 6:00 am
Categories: CEO Interviews, EDA, llmda.ai

Kurt Shuler

Arteris is one of the most impressive companies SemiWiki has worked with over the last fifteen years. We have collaborated on one hundred and seventy-three articles/podcasts that have garnered more than two million views/listens. The success of Arteris can be easily tracked to the executive team and Kurt Shuler was the executive… Read More

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Connecting the Dots: Why RISC-V System Design Is Entering a New Era

Connecting the Dots: Why RISC-V System Design Is Entering a New Era
by Kalar Rajendiran on 05-04-2026 at 10:00 am
Categories: AI, Arteris, IP

Andes x Arteris Pre Verified and Silicon Proven SoC Integration

At the recent RISC-V Now event hosted by Andes, the discussion underscored the fact that RISC-V is no longer just about instruction set architecture advantages or customizable cores. The real focus has moved up the stack to system-level design. This is where connectivity, integration, and security define whether an innovation… Read More

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SemiWiki Acquires IPnest!

SemiWiki Acquires IPnest!
by Daniel Nenni on 04-24-2026 at 8:00 am
Categories: IPnest, Semiconductor Services

AI IP Image

After more than 15 years of collaboration with Dr. Eric Esteve and IPnest, SemiWiki has acquired the famed IP reports with Eric Esteve staying on through 2026 to ease the transition. Not only will SemiWiki provide the industry standard Interface IP and Design IP reports, SemiWiki will be expanding the depth and breadth of the coverage.… Read More

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NoC Matters: Designing the Backbone of Next-Gen AI SoCs

NoC Matters: Designing the Backbone of Next-Gen AI SoCs
by Daniel Nenni on 04-13-2026 at 10:00 am
Categories: Aion Silicon, Semiconductor Services

Arteris NoC Hardware

Modern SoC design for artificial intelligence workloads has fundamentally shifted the role of the network-on-chip (NoC) from a simple connectivity fabric to a primary architectural determinant of system performance, power, and scalability. As compute density increases and heterogeneous accelerators proliferate, data… Read More

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NXP Expands Arteris NoC Deployment to Scale Edge AI Architectures

NXP Expands Arteris NoC Deployment to Scale Edge AI Architectures
by Daniel Nenni on 04-09-2026 at 8:00 am
Categories: Arteris, IP

NXP announcement v4b 021026 FINAL

As edge AI systems become more centralized and compute-dense, on-chip data movement is increasingly the architectural bottleneck. NXP’s expanded deployment of Arteris network-on-chip (NoC) and cache-coherent interconnect IP highlights a broader industry trend: interconnect architecture is now a first-order design … Read More

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Arteris Smart NoC Automation: Accelerating AI-Ready SoC Design in the Era of Chiplets

Arteris Smart NoC Automation: Accelerating AI-Ready SoC Design in the Era of Chiplets
by Daniel Nenni on 01-22-2026 at 6:00 am
Categories: AI, Arteris, Chiplet, IP

Smart NoC Automation Accelerating AI Ready SoC Design in the Era of Chiplet

As semiconductor design pushes into increasingly complex territory, driven by Ai, ML, HPC, and heterogeneous system architectures, designers are challenged to balance performance, power, and time-to-market pressures. In this landscape, network-on-chip (NoC) architectures have emerged as a foundational building block… Read More

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WEBINAR: Why Network-on-Chip (NoC) Has Become the Cornerstone of AI-Optimized SoCs

WEBINAR: Why Network-on-Chip (NoC) Has Become the Cornerstone of AI-Optimized SoCs
by Admin on 12-15-2025 at 8:00 am
Categories: AI, Arteris, Events, IP

AION Silicon Arteris Webinar

By Andy Nightingale, VP of Product Management and Marketing

As AI adoption accelerates across markets, including automotive ADAS, large-scale compute, multimedia, and edge intelligence, the foundations of system-on-chip (SoC) designs are being pushed harder than ever. Modern AI engines generate tightly coordinated, … Read More

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Live Webinar: Considerations When Architecting Your Next SoC: NoC with Arteris and Aion Silicon

Live Webinar: Considerations When Architecting Your Next SoC: NoC with Arteris and Aion Silicon
by Daniel Nenni on 11-27-2025 at 8:00 am
Categories: Aion Silicon, Arteris, Events, Semiconductor Services
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The explosive growth of AI and accelerated computing is placing unprecedented demands on system-on-chip (SoC) design. Modern AI workloads require extremely high bandwidth, ultra-low latency, and energy-efficient data movement across increasingly heterogeneous architectures. As SoCs scale to incorporate clusters of… Read More

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Arteris at the 2025 Design Automation Conference #62DAC

Arteris at the 2025 Design Automation Conference #62DAC
by Daniel Nenni on 06-22-2025 at 8:00 am
Categories: Arteris, Chiplet, Events, IP

62nd DAC SemiWiki

Key Takeaways:

  • Expanded Multi-Die Solution: Arteris showcases its foundational technology for rapid chiplet-based innovation. Check out the multi-die highlights video.
  • Ecosystem compatibility: Supported through integration with products from major EDA and foundry partners, including Cadence, Synopsys, and global
… Read More