Security by Design: Arteris Expands Its Partnership with Arm

Arteris has expanded its partnership with Arm to deploy Cycuity Radix hardware security assurance technology across additional next-generation Arm central processing unit (CPU) programs. The expansion follows five years of collaboration and successful use of Cycuity Radix on select Arm CPU designs, and it moves hardware security verification deeper into processor development, where potential weaknesses can be found and fixed before silicon exists.

The announcement is worth reading for the how, not just the scale. Modern processor security is more than a checklist of features like secure boot or memory protection; vulnerabilities can also emerge from the way microarchitectural state, control logic, debug functions, and shared resources interact. Arteris says Cycuity Radix gives Arm visibility into these security-relevant design relationships and potential attack surfaces, helping engineering teams assess critical assets against known threat models.

Cycuity Radix is now a larger part of Arm’s security assurance process, enabling systematic verification and analysis across critical CPU architectures and performance features. This isn’t about a one-time assessment of a single design. It is about Arm investing in security verification to increase its confidence that its solutions work as designed and that secrets don’t leak where they aren’t supposed to go.

That is the value of Information Flow Tracking. A design can perform its intended function while sensitive information still travels along an unexpected path. Cycuity Radix lets teams follow those assets through the design and see whether information reaches destinations that the security rules say should be off-limits.

This is where Radix gets interesting. It does not simply report that a security rule passed or failed. Radix provides several ways to inspect the flow: information-flow overlays, schematic views and waveforms. These views show the route a protected asset took through the design, giving engineers a way to work backward from an unexpected destination. Security requirements are converted into rules, which become monitors that run in standard simulators and emulators. Radix also calculates hardware security coverage, helping teams see which objectives have been exercised and where more testing may be needed. The coverage number does not replace engineering judgment, but it can help expose what has not been exercised.

Arm applies the Cycuity Radix methodology as part of the CPU design flow. Per the release, the process begins with architectural and microarchitectural security risk assessments that identify critical assets and evaluate them against known threat models to form security objectives. Automation and cross-CPU reuse of the Cycuity Radix security properties keep verification scalable as Arm expands the methodology across additional programs.

That reuse detail is the quiet headline. Security properties used across CPU programs allow assurance work to carry forward instead of beginning again with every design. That makes reuse more than a tool feature: it connects successful use on select designs with a repeatable assurance process across additional programs.

Bottom line: Arm is expanding Cycuity Radix from select CPU designs to additional next-generation programs. That expansion is a strong signal that hardware security assurance is becoming a standard part of processor development, alongside performance and power.

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