Ethernet Enhancements Enable Efficiencies

Up until 2016, provisioning Ethernet networks was a little bit like buying hot dogs and hot dog buns, in that you could not always match up the quantities to get the most efficient configuration. That dramatically changed when the specification for Ethernet FlexE was adopted by the Optical Internetworking Forum as OIF-FLEXE-01.0. The surging demand for higher data rates and more flexible network configuration led to this innovative addition to the Ethernet standard.

FlexE fits in between the MAC and PHY, using MII interface signals. In fact, its operation can be so transparent that it is called a FlexE shim and can be completely transparent to existing physical transport layers. Of course, there is a FlexE ‘aware’ configuration that offers further flexibility for transport hardware that is aware of FlexE.

There are three main operations that FlexE can perform. Using these, a number of significant networking efficiency problems can be solved. The first is bonding, where large data pipes can be connected to multiple lower bandwidth physical lanes. For instance, five 100 GE lanes could be used to support a 500Gbps connection. FlexE can do this without the ~30% loss of efficiency of the link aggregation (LAG) solutions previously used for this purpose. Also, FlexE makes the connection performance deterministic, another advantage over LAG.

The second main capability of FlexE is sub-rating of links. There are instances where a link may operate more efficiently at a lower bandwidth than its interface rating. One example provided by the OIF is where a 300 Gbps link is desired, but its coherent optical physical layer needs four 75 Gbps inputs to send 150 Gbps each over two wavelengths. OIF points out that FlexE allows four 100 GE lanes to carry only 75 Gbps each to suit these needs. The down conversion from 300 Gbps is done in the FlexE shim that feeds the four 100 GE lanes.

The Third major feature of FlexE is channelization, where multiple data streams can be intermixed on one or more FlexE links. This is convenient for cases like 5G where there will be a number of smaller streams that can be interleaved into larger links and be recovered at the endpoint. This delivers a mechanism that allows service providers to offer deterministic Ethernet-oriented pipes of flexible width.

Anyone designing silicon that uses Ethernet will want to incorporate FlexE functionality to ensure optimal and full use of physical layer transport. Along with FlexE, another essential IP for chips that perform communications and networking is forward error correction (FEC). The move to PAM4 with multilevel signaling is exacerbating this need because the higher bandwidth it offers comes with a penalty in the signal to noise ratio, leading to higher bit error rates (BER).

Fortunately, Open-Silicon (a SiFive Company), a leading SOC development solution provider, offers IP that enables their customers to build high performance SOCs that take full advantage of high bandwidth Ethernet, FlexE and FEC for PAM4. The three components of this are Ethernet PCS IP, FlexE IP and multi-channel/multi-rate FEC IP.

The PCS IP supports 64b/66b encoding and decoding and is compatible with a wide range of MII versions. It runs from 10G to 400G. As mentioned above the Open-Silicon FlexE IP supports FlexE aware and unaware interfaces. Their FEC can be used in SerDes that support PAM4 and run up to 400G and can connect up to 32 SerDes lanes. It also can be used for Interlaken as well as Ethernet.

With high speed and high efficiency date transport continuing to be an essential prerequisite for business success, solution providers need to have networking solutions that allow facile data flow from the edge to the cloud to support increasingly complex business models and end-user functionality. Open-Silicon is continuing to maintain a technological edge in this area with the addition of this set of communications related IP.