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Herb Reiter on the Challenges of 2.5D ASIC SiPs

Herb Reiter on the Challenges of 2.5D ASIC SiPs
by Daniel Nenni on 02-23-2018 at 12:00 pm


Years ago my good friend Herb Reiter promoted the importance of 2.5D packaging to anybody and everybody who would listen including myself. Today Herb’s vision is in production and the topic of many papers, webinars, and conferences. According to Herb, and I agree completely, advanced IC packaging is an important technology for leading edge chip companies who are focused on high performance and low power. TSMC agrees of course supported by their CoWoS and INFOs packaging technology which has been adopted by leading semiconductor companies (Apple, Nvidia, Xilinx, etc…).

The latest trend for 2.5D packaging is the leading ASIC companies enabling the masses and as we write about it the word is spreading quickly to emerging AI chip companies (Nervana, DeePhi, Mythic, Groq) and the systems companies that are now doing their own chips (Google, Amazon, Facebook). On March 6[SUP]th[/SUP] you have the opportunity to hear it from Herb himself via a webinar sponsored by leading ASIC company Open-Silicon:

Solutions and Strategies to Mitigate the Physical Design, Assembly and Packaging Challenges of 2.5D ASIC SiPs

This Open-Silicon webinar, moderated by Herb Reiter of eda 2 asic Consulting, Inc., will address the unique physical design, assembly and packaging challenges of 2.5D ASIC SiPs, and outline the proven solutions and strategies that are available to mitigate these issues in order to successfully ramp ASIC SiP designs into volume production. Using a 2.5D HBM2 ASIC SiP as a case study, the panelists will cover all aspects of physical design of the interposer, ASIC, signal integrity analysis and STA, rail analysis and power integrity analysis. They will also address the package design, assembly and testing both at the wafer level and the SiP level.


21219-herb-reiter.jpg asic 2.5d

The panelists will emphasize the importance of understanding the entire 2.5D ASIC SiP manufacturing supply chain ecosystem and all of its stakeholders, such as the HBM2 memory, ASIC, interposer, package substrate, assembly house, foundry and more. Attendees will learn about system planning, 2.5D ASIC SiP requirements and implementation strategies, package assembly flows, verification, test, and signoff. By understanding the implementation and manufacturing challenges associated with 2.5D ASIC SiPs and the solutions available, designers and architects will be better equipped to achieve high volume manufacturing with lower risk, higher performance and faster time-to-market.

This webinar is ideal for chip designers and SoC architects of the next generation of high bandwidth applications in HPC, networking, deep learning, virtual reality, gaming, cloud computing and data centers.

Herb has more than 30 years of semiconductor experience and he has been a tireless promoter of 2.5D packaging for many years. Herb writes for and works with industry organizations on 2.5D work groups and events at conferences around the world. I have worked with Herb on various conferences and recommend him professionally at every opportunity. Herb’s company EDA 2 ASIC Consulting started with single die designs in 2002 and now helps with the transition to multiple dies in a single package. This is one webinar that you don’t want to miss, absolutely.

About Open-Silicon

Open-Silicon transforms ideas into system-optimized ASIC solutions within the time-to-market parameters desired by customers. The company enhances the value of customers’ products by innovating at every stage of design — architecture, logic, physical, system, software and IP — and then continues to partner to deliver fully tested silicon and platforms. Open-Silicon applies an open business model that enables the company to uniquely choose best-in-industry IP, design methodologies, tools, software, packaging, manufacturing and test capabilities. The company has partnered with over 150 companies ranging from large semiconductor and systems manufacturers to high-profile start-ups, and has successfully completed 300+ designs and shipped over 130 million ASICs to date. Privately held, Open-Silicon employs over 250 people in Silicon Valley and around the world. www.open-silicon.com


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