Complete 1.6T Ethernet IP Solution to Drive AI and Hyperscale Data Center Chips

Complete 1.6T Ethernet IP Solution to Drive AI and Hyperscale Data Center Chips
by Kalar Rajendiran on 03-07-2024 at 10:00 am

Synopsys 1.6T Ethernet IP Solution Image 2

The demand for high-bandwidth, low-latency networking solutions has never been greater. As artificial intelligence (AI) workloads continue to grow exponentially, and hyperscale data centers become the backbone of our digital infrastructure, the need for faster and more efficient communication technologies becomes imperative.… Read More


Accelerate AI Performance with 9G+ HBM3 System Solutions

Accelerate AI Performance with 9G+ HBM3 System Solutions
by Kalar Rajendiran on 03-06-2024 at 10:00 am

HBM3 PHY and Controller Memory Solution

In the technology realm of artificial intelligence (AI) and high-performance computing (HPC), the demand for higher throughput and efficiency has never been greater. To meet these evolving demands, innovative memory solutions have emerged as critical enablers, paving the way for transformative advancements in computing… Read More


Chiplet Interconnect Challenges and Standards

Chiplet Interconnect Challenges and Standards
by Daniel Payne on 05-25-2023 at 10:00 am

Multi die IP min

For decades now I’ve watched the incredible growth of SoCs in terms of die size, transistor count, frequency and complexity. Instead of placing all of the system complexity into a single, monolithic chip, there are now compelling reasons to use a multi-chip approach, like when the maximum die size limit is reached, or it’s… Read More


PCIe Gen 6 Verification IP Speeds Up Chip Development

PCIe Gen 6 Verification IP Speeds Up Chip Development
by Tom Simon on 07-08-2021 at 10:00 am

PCIe Gen 6 VIP

PCIe is a prevalent and popular interface standard that is used in just about every digital electronic system. It is used widely in SOCs and in devices that connect to them. Since it was first released in 2003, it has evolved to keep up with rapidly accelerating needs for high speed data transfers. Each version has doubled in throughput,… Read More


Die-to-Die Connections Crucial for SOCs built with Chiplets

Die-to-Die Connections Crucial for SOCs built with Chiplets
by Tom Simon on 06-21-2021 at 6:00 am

die to die connections

If you ascribe to the notion that things move in circles, or concentrically, the move to die-to-die connectivity makes complete sense. Just as multi-chip modules (MCM) were the right technology decades ago to improve power, areas, performance and cost, the use of chiplets with die-to-die connections provides many advantages… Read More


USB 3.2 Helps Deliver on Type-C Connector Performance Potential

USB 3.2 Helps Deliver on Type-C Connector Performance Potential
by Tom Simon on 03-08-2021 at 10:00 am

USB 3.2 Lane Usage

Despite sounding like a minor enhancement version for USB, USB 3.2 introduces many important changes for the USB specification. To see where USB has come from and where it is going, it is essential to look at what is found in USB 3.2. The other salient point is that now the Type-C connector has split out from the underlying USB specification… Read More