With memories taking up in some cases over 50% of the area of many ASIC designs, their selection and implementation can affect everything from power and timing to the choice of packaging. As a result, the process of deciding among all the options for ASIC memories becomes time and energy intensive. Memory selection even affects first order design parameters such as foundry, node package, and process selection.
With so much at stake, one would hope that the actual selection process would be as smooth and as informative as possible. After all, we live in an age where researching big ticket purchases such as cars and houses can be done right on your computer. Likewise, everything from music, movies, dishwashers, hotel accommodations and more can all be searched and explored online. If only a designer could have the same level of transparency and depth of information available online for the make-or-break memory IP in their ASIC’s.
eSilicon recently hosted a webinar that shows how their STAR Navigator lets designers start with configuration requirements such as memory type and size, single port or dual port, BCAM or TCAM, etc., and compare them in detail. In this case detail means everything you would want to know.
For each specific memory there is a data sheet, but that is just the beginning. For each memory selected (fab, node, flavor, type, size…) the characteristics of each are viewable and can be graphed for comparison. This allows side by side examination at various process corners. Plots are available using area, power, leakage, speed as axes. All selected modules are plotted concurrently. Rolling the mouse over the graph in the web interface shows the particulars of each specific instance. All the plot data can be downloaded for offline manipulation as well.
Users of STAR Navigator also can open the full data sheet for the memory blocks they are interested in to view detailed timing and interface specifications. It’s easy to download the data to look at later offline. If fact, odds are that many different instances and options will need to be compared, so eSilicon STAR Navigator makes it easy to created tabular lists of all the instances you want to track and explore. In my view the usability looks well thought out and is very mature. We all remember the days of early airline, hotel and flight booking software that was hard to use. I was reminded of the best of the current generation of these when I watched the webinar.
So, let’s suppose you find a memory that looks like it will meet project requirement. Naturally the next step would be to include the collaterals into the design flow. For this we need LEF, and Verilog, ATPG and other models. eSilicon enables direct download of these from the same interface. As a result design work moves right on ahead.
We are all familiar with tire kicking and window shopping. In the case of cars, you pretty much still have to go down to the dealer and do lot of paperwork to drive away in your new car. Here is where eSilicon has a very unique idea. Once a company is set up on STAR Navigator, they can buy and download the instances needed. In the case where the cost of the instances exceeds the cost of the compiler for the same, the design team can get the compiler itself.
This webinar is a no fluff view of how their system for configuring, selecting and buying memory IP works. I’d have to say that this system is well thought out and appears as though it would be useful to designers. Imagine spending less time struggling with finding out what memory options are available and instead being able to examine them with fine granularity immediately without back and forth emails and NDA’s. Indeed, there is even a “chat” feature in STAR Navigator to help people get questions answered in real time. If you want to see a replay of the webinar it is available on the eSilicon website.