DAC News – A New Era of Electronic Design Begins with Siemens EDA AIAI is the centerpiece of DAC this year.…Read More
Arteris at the 2025 Design Automation Conference #62DACKey Takeaways: Expanded Multi-Die Solution: Arteris showcases its…Read More
Secure-IC at the 2025 Design Automation Conference #62DACSecure-IC at DAC 2025: Building Trust into Tomorrow’s…Read More
I’m watching the latest Mars rover landing tonight called “Curiosity” and wondering about all of the electronic systems designed to control the project and hopefully send back some stunning new images along with new data on the micro-biology and chemistry of the red planet. JPL gets all the glory for designing… Read More
Electronic Design Automation, or more affectionately known as EDA, is a relatively young $5B industry with a very colorful upbringing, one that I have experienced firsthand, I’m very grateful for, and is an honor to write about. Today EDA employs an estimated 27,000 people! There is a nice EDA Wikipedia page which can be found here… Read More
Another week in EDA and yet another acquisition by Synopsys as they buy SpringSoft this time for $406 million in cash. Paul McLellan wrote a good blog on this merger too.
Last week I blogged about the product overlap and integration challenges that Synopsys faces with the acquisition of Ciranova.
Let’s take a look at the IC … Read More
Today it was announced that Synopsys is acquiring SpringSoft for $406 million dollars ($12.2B Taiwanese). Coincidentally, I was in SpringSoft’s US office yesterday to talk about how Laker is being used for 20nm design. More of that later. But there was certainly nothing to indicate that anyone there was expecting this.… Read More
The need for Network-on-Chip (NoC) has appeared at the time where chip makers realized that they could really integrate a complete system on a single die to build a System-on-Chip (SoC). At the early times (1995-2005), the so-call NoC IP suppliers were in fact proposing a crossbar switch, a pretty old concept initially developed… Read More
Ken Brockof Synopsys presented on how to optimize your SoC design for low power at 40nm, 28nm and 20nm nodes in a webinar today. Ken and I both worked together at Silicon Compilers back in the late 1980’s, the best EDA/IP company that I’ve had the pleasure to join.
The webinar made a brief mention of 14nm and FinFETS but … Read More
In 1985 Morris Chang was recruited by the Taiwanese government to help develop the emerging semiconductor industry. In 1986 Morris joined the Hsinchu based non profit research institute ITRI as Chairman and President and launched what would be TSMC’s first semiconductor wafer fabrication plant on the ITRI campus. Taiwan… Read More
The High Tech Trial of this Century: Apple vs. Samsung may end up being the catalyzing event that advances the established PC Monopolists known as Wintel (Microsoft and Intel) into leadership positions in the new era known as the Mobile Tsunami. Not a chance you say? Consider that the Apple, Samsung War is one that will not be settled… Read More
Cadence has a series of webinars about their digital flow, focused on 28nm design. It is easy for all of us in the EDA ecosystem to assume that everyone is already doing 20/22nm design, if not 14nm already. But in fact most designs are still being done at 45nm and 65nm; 28nm is still a big challenging step.
One of the tools in the Cadence… Read More
Josefina Hobbs, a solutions architect at Synopsys, shows the integration of Synopsys Protocol Analyzer with SpringSoft’s Verdi using the Verdi Interoperability Apps (VIA) which gives open access to the Verdi KDB and FSDB databases. She also demonstrates protocol debug made easy using the Protocol Analyzer. This gives… Read More
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Flynn Was Right: How a 2003 Warning Foretold Today’s Architectural Pivot