Combine the pressures of Moore’s Law which enable billion transistor SoCs and the shortened time to market from consumer electronics product cycles and you have the perfect storm for EDA tool vendors. A modern SoC can have 500 or more blocks, creating both a design and verification challenge. How in the world do you write … Read More





Even More Integration and Automation for ARM-based Designs
The attraction to an IP-based design methodology is that you can assemble an SoC from ready-made IP blocks, saving you valuable engineering development and verification time, while reducing risks from having to develop something from scratch and hoping that they meet industry standard specs. ARM is well known for supplying … Read More
Making Things Visible for 25 Years
This year is most notably the 50th anniversary of Moore’s Law. It is also the 25th anniversary of Concept Engineering. They were founded in 1990 in Freiburg Germany. They started by providing automatic schematic generation from netlist. They sold primarily to other EDA companies and to internal development groups in semiconductor… Read More
A Robust Lint Methodology Ensures Faster Design Closure
With the increase in SoC designs’ sizes and complexities, the verification continuum has grown larger to an extent that the strategies for design convergence need to be applied from the very beginning of the design flow. Often designers are stuck with never ending iterations between RTL, gate and transistor levels at different… Read More
Why is Intel going inside Altera for Servers?
You should be happy to listen that Intel will buy Altera FPGA challenger, if you expect always more power to be consumed in datacenter! In 2013 the power consumption linked with the Servers and Storage IC activity, plus the electricity consumed in the systems cooling these high performance chips has reached 91 BILLION KWh (or the… Read More
The State of Desktops, Notebooks and Tablets
The personal computing market started out back in the late 1970’s, with IBM being a relative late-comer in 1981, however over many decades we’ve seen the unit volumes steadily increasing each year driving demand of semiconductors of all types. IC Insights is a research company that follows the personal computer … Read More
Ultra-Low Power Non-Volatile Memory Solutions for the Smart Connected Universe
DAC is a great place to gather information about products and technologies. However it can be difficult to chase down the information you need because you may need to cover a lot of ground to hear or talk to the people with the right knowledge. Fortunately there are a few places you can go to learn about a number of products at one place.… Read More
Aldec packs 6 UltraScale parts on HES-7
A few months ago, when the Xilinx UltraScale VU440 FPGA began shipping, one of the immediate claims was a quad-FPGA-based prototyping board touted as “Godzilla’s Butcher on Steroids”. That was a refreshing and creative PR approach, frankly. I’m always careful with less creative terms like “world’s biggest” or “world’s fastest”,… Read More
The Trojan Horse Was Free Too
Timeo Danaos et dona ferentes. I fear the Greeks especially when bearing gifts. In Virgil’s Aeneid these words are spoken by the Trojan priest Laocoön warning about the wooden horse that the Greeks have offered Troy. But to no avail, Laocoön is slain by serpents and the Trojans bring the horse inside the walls of Troy. Since… Read More
Will those IO pad rings pass foundry muster?
I was talking recently to Dina Medhat, a senior technical marketing engineer at Mentor, about, of all things, IO rings. It has not occurred to me that verifying that your IO rings comply with foundry rules presents new challenges.
IO ring checking isn’t new, nor is it unique to advanced IC process nodes. However, the same forces of… Read More
Facing the Quantum Nature of EUV Lithography