As I have written before, IoT looks to be a key driver for design starts and future semiconductor revenue growth which is why we wrote “PROTOTYPICAL” and included a field guide to FPGA Prototyping. If you want to get funding for your new IoT chip project, having a working prototype is a good thing, absolutely. If you want to take a look… Read More
Latest Savage on Security Webinar Focuses on Gen-AI for Chip Design and SecurityKey Takeaways from the webinar: Multi-agent intelligent assistant…Read More
Meet Quadric on the Road: Three Must-Attend AI EventsThis late summer, Quadric is taking its vision…Read More
PDF Solutions’ Exensio Was Built for Semiconductor Analytics. The New Exensio Aurora Architecture Is Built for Semiconductor Intelligence.The semiconductor industry doesn't have a shortage of…Read More
Beyond Moore: Co-Optimizing AI from Systems to Materials System Technology Co-optimization in…Read More
Focusing on the AI Big Picture with Moores Lab AI at DAC 2026DAC 2026 proved that agentic AI design flows…Read MoreMy #53DAC Must See List!
It may be hard to believe but this happens to be my thirty third Design Automation Conference. Where does the time go? Three of my kids are out of college and the last one is getting close. That is where my time has gone. The conference itself started in 1964 but my first one was in 1984 in Albuquerque, New Mexico. In fact, that was the year… Read More
A Shot in the ARM for IoT
I recently attended the IoT Developers Conference in Santa Clara, CA. There were clearly two major themes in the talks – security and low power. The volume market in IoT is in the edge node devices. These devices have two important characteristics. They acquire data which needs to be transmitted and they typically are battery-driven… Read More
Reusable HW/SW Interface for Portable Stimulus
Although semiconductor community has ushered into the era of SoCs, the verification of SoCs is still broken. There is no single methodology or engine to verify a complete SoC; this results in duplication of efforts and resources for test creation and verification at multiple stages in the SoC development, albeit with different… Read More
IMEC Technology Forum (ITF) – Moving the Electronics Industry Forward
IMEC is a technology research center located in Belgium that is one of the premier semiconductor research centers in the world today. The IMEC Technology Forum (ITF) is a two-day event attended by approximately 1,000 people to showcase the work done by IMEC and their partners.
Gary Patton is the Chief Technical Officer and Senior… Read More
iDRM – A Complete Design Rule Development System
Design rules are at the heart of the interface between the foundry and semiconductor designers, which makes them so critical. Traditionally, design rules and DRC decks have been developed manually with no or little automation. Design rule definitions are written using WORD or other general purpose office tools, and DRC decks… Read More
Quick Guide to FD-SOI at #53DAC
If you’re headed to #53DAC (June 5-9 in Austin,TX) and are interested in learning more about FD-SOI, there will be lots of opportunities. Here’s a quick guide to get you started. … Read More
Making a smart city like Austin smarter
One of the takeaways from the recent #NXPFTF in Austin was the potential for smart cities. As the EDA industry gathers again for @53rdDAC, visitors will see firsthand how much high-tech talent there is in #ATX – and how big a challenge is developing.… Read More
Layout Pattern Matching for DRC, DFM, and Yield Improvement
It is truly amazing to consider the advances in microelectronic process development, using 193i photolithography. The figure below is a stark reminder of the difference between the illuminating wavelength and the final imaged geometries. This technology evolution has been enabled by continued investment in mask data generation… Read More


Verification IP proves essential for PCIe GEN5