As exciting as the Internet of Things (IoT) is, the question of how and which companies stand to make money in this market remains. From previous waves of internet markets we have seen surprising wins and epic loses. How is the IoT market shaping up? And what are the real business drivers? According to a Silicon Valley Bank analysis… Read More
Siemens EDA Makes 3D IC Design More Accessible with Early Package Assembly Verification2.5D and 3D ICs present special challenges since…Read More
Webinar: Fine-grained Memory Protection to Prevent RISC-V Cyber AttacksMost organizations are aware of cybercrime attempts such…Read More
Webinar: Samtec and Achronix Expand AI in the Data CenterThe performance demands of data centers continue to…Read More
Don't Settle for Less Than Optimal - Get the Perfect Inductor Every TimeThe meaning of the word “Veloce” is “blazing…Read More
Synopsys is Paving the Way for Success with 112G SerDes and BeyondData communication speeds continue to grow. New encoding…Read More
No IoT No Justice!
It looks like even President Obama is on the IoT bandwagon now with his $263M in matching funds for state and local police body cameras and training. It is a shame that it took a tragic event to spur this type of Government investment in semiconductor technology but I appreciate it just the same.
As I have mentioned before, when I read… Read More
Getting up close and personal with symmetric session key exchange
In today’s world, the three pillars of security are confidentiality, integrity (of the data), and authentication (i.e. “C.I.A.”). Fortunately, Atmel CryptoAuthentication crypto engines with secure key storage can be used in systems to provide all three of these.
Focusing on the confidentiality pillar, in a symmetric system… Read More
HLS – Major Improvement through Generations
I am a believer of continuous improvement in anything we do; it’s pleasant to see rapid innovation in technology these days, especially in semiconductor space – technology, design, tools, methodologies… Imagine a 100K gates up to 1M gates design running at a few hundred MHz frequency and at technology node in the range of .18 to … Read More
Design Rule Checking (DRC) Meets New Challenges
The traditional batch-oriented DRC process run as a final check to ensure compliance with foundry yield goals is quickly moving toward a concurrent DRC process performed early and often throughout design, especially at the 28 nm and smaller process nodes. What are the technology factors causing this change?
- Increasing number
Fitness Watch Anyone?
I’m an exercise junkie. I’m also not a spring chicken so I like having the time on my wrist. I’ve been anxiously awaiting an iWatch to go with my iPhone 6. As patience is not a virtue of mine, and the iWatch is rumored to be expensive ($400-500). I decided to try a fitness watch.
This is a crowded area that includes activity… Read More
3DIC in Burlingame
Every year in December is what I think of as the main 3D IC conference where you can get up to speed on all the latest. Officially it is called 3D Architectures for Semiconductor and Packaging or 3D ASIP. It is held in the Hyatt Regency in Burlingame (the one right by 101 near the airport). This year it is from December 10-12th.
The first… Read More
Don’t Mess with SerDes!
SerDes stands for Serializer/Deserializer, and SerDes is a serious piece of design, requiring an extremely experienced team of analog engineers (below 10 years’ experience, you’re still a quasi-beginner). Better to rely on an analog guru to draw the SerDes architecture and manage the team! Why does SerDes is becoming more and… Read More
How to Optimize for Power at RTL
Last week I was traveling in Munich attending the MunEDA User Group meetingso I missed a live webinar on the topic of optimizing for power at RTL. I finally got caught up in my email this week and had time to view this 47 minute webinar, presented by Guillaume Boilletof Atrenta. He recommended using a combination of automatic, semi-automatic… Read More
Solution for PI, TI & SI Issues in 3D-ICs
As we move towards packing more and more functionalities and increasing densities of SoCs, the power, thermal and signal integrity issues keep on rising. 3D-IC is a great concept to stack multiple dies on top of each other vertically. While it brings lot of avenues to package dies with multiple functions together, it has challenges… Read More
Tools for Chips and Dips an Overview of the Semiconductor Tools Market