Advanced Architectures for Hybrid III-V/Silicon Quantum Cascade LasersMid-infrared (MIR) photonic integrated circuits are emerging as…Read More
Efficient Bump and TSV Planning for Multi-Die Chip DesignsThe semiconductor industry has experienced rapid advancements in…Read More
The Evolution of RISC-V and the Role of Andes Technology in Building a Global EcosystemDuring my frequent trips to Taiwan as a…Read More
Capability Hardware Enhanced RISC Instructions CHERI AllianceThe CHERI Alliance is a non-profit organization dedicated…Read More
Operationalizing Secure Semiconductor Collaboration: Safely, Globally, and at ScaleSemiconductor manufacturing is among the most complex industrial…Read More
The news of a pedestrian fatality in Tempe, Ariz., resulting from the operation of an Uber autonomous vehicle has set off alarm bells throughout the AV development community. As always in such circumstances there will be a simultaneous rush to judgement and the immediate termination of all such testing, as well as a call for calm… Read More
Synopsys hosts a regular lunch at DVCon each year (at least over the last few years I have checked), a nice meal and a show, opening a marketing update followed by 2-3 customer presentations on how they use Synopsys verification in their flows. This year’s event was moderated by Piyush Sancheti from Synopsys Verification marketing… Read More
Just like good ideas percolate longer, we have seen AI adoption pace picking-up speed, propelled by faster GPUs. Some recent data points provide good indication that FPGA making a comeback to bridge chip-design needs to keep-up with AI’s ML applications.
According to the Deloitte research firm there is a projected increase of… Read More
For those of you who wondered at the logic behind Siemens acquisition of Mentor Graphics last year, look no further than a recent announcement by Mentor, now a Siemens business, regarding the release of their new Mentor Embedded IoT Framework (MEIF). To help connect the dots, we need to back up a bit and review a few things about how… Read More
Designers spend a lot of time looking at their layouts in 2D. This is done naturally because viewing in 2D is faster and simpler than in 3D. It helps that humans are good at extrapolating from 2D to 3D. Analysis software, such as extraction software also spend a lot of time looking at layouts in 2D. While this is fine for approximate results,… Read More
This year I got a chance to talk with Cadence at DVCon on a whole bunch of topics, so expect a steady stream of blogs over the next couple of months. First up was an update from Pete Hardee (Director of Product Management) on, surprise, surprise, formal verification. I’m always trying to learn more about this space, so I picked a couple… Read More
FPGAs have been used for ASIC prototyping since the beginning of FPGAs (1980s) allowing hardware and software designers to work in harmony developing, testing, and optimizing their products. We covered the history of FPGAs in Chapter 3 of our book “Fabless: The Transformation of the Semiconductor Industry”, which includes … Read More
From our book “Mobile Unleashed”, this is a detailed history of Qualcomm:
Chapter 9: Press ‘Q’ to Connect… Read More
To borrow a punch line from Duke professor Dan Ariely, artificial intelligence is like teenage sex: “Everyone talks about it, nobody really knows how to do it, everyone thinks everyone else is doing it, so everyone claims they are doing it.” Even though AI systems can now learn a game and beat champions within hours, they are hard … Read More
The most viewed blogs I write for SemiWiki are consistently blogs comparing the four leading edge logic producers, GLOBALFOUNDRIES (GF), Intel, Samsung (SS) and TSMC. Since the last time I compared the leading edge new data has become available and several new processes have been introduced. In this blog I will update the current… Read More
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Unraveling Dose Reduction in Metal Oxide Resists via Post-Exposure Bake Environment