Complex PCB signoff challenges

Many complex PCB designs have high data-rate signals like USB, PCIe, DDR and HDMI which call for more thorough verification methods to ensure compliance plus mitigate any signal integrity, power integrity and EMI/EMC issues. Siemens has a methodology that uses automated rule-based electrical verification with an EDA tool, HyperLynx DRC. This blog stems from reading their white paper. The old method of manual verification is just too slow and inadequate to ensure no respins.

The complexity and density of PCBs have increased significantly over the last 20 years, creating the need for multiple specialized verification experts, which can add more bottlenecks in the design process. Design teams require detailed knowledge of protocols and new verification techniques to be successful.

Electrical verification can take significant time for tasks like model set up and validation, often leading to delays. Models range from datasheets to complex S-parameters and even extracted 3D structures. EDA tool complexity can reduce engineering efficiency, so using automation helps improve productivity. Stitching together multiple point tools from different vendors increases CAD integration efforts. The goal should be automating tasks and shifting verification to earlier in the design process.

Traditional manual inspection and verification are both time-consuming and prone to human error, especially when it’s performed only at the end of design. The manual approach has visual checks performed layer-by-layer and net-by-net, with only critical nets and corner cases manually simulated. This leads to only partial inspection, risking missed issues. In contrast, automated DRCs can be run throughout the design cycle, actually saving time and reducing errors.
Proper targeting of PCB areas via object lists and parameter settings is crucial for efficient rule checks using HyperLynx DRC. There are system-generated object lists that filter components automatically.

In addition there are user-defined object lists to target specific signals or protocol, where parameters reflect actual design choices, such as high-speed net names or voltage levels. Proper set up reduces false violations and streamlines verification.

Rules in HyperLynx are organized into groups within .hldset and .hldproj files, enabling reuse across projects. The default .hldset file provides a starting point to save and capture object lists and rule groups that users define. Custom rule libraries can be created for different technologies and shared between PCB projects and with a hierarchical organization it allows inheritance. Having reusable rule setups improve consistency and efficiency.

HyperLynx DRC detects EMI/EMC issues like metal islands and return path breaks rapidly, typically in seconds, unlike visual inspection which takes 30 minutes to an hour. As an example this metal island detection completed in just 2 seconds.

There are even rule checks for return path continuity during layer changes, so that violations, such as reference plane breaks, are highlighted with correction advice. Detection time for EMI issues is under a minute, aiding quick fixes with HyperLynx.

Automated signal integrity (SI) rules identify issues like impedance discontinuities and crossing gaps efficiently, so that you can focus on easy fixes first to reduce modeling workload. The key rules include impedance and differential impedance checks. Nets crossing gaps are automatically checked for impedance change and reflection risks.

Power delivery is verified through rules that ensure proper decoupling and grounding. The out-of-the-box rules cover decoupling capacitor placement and coverage. Checks include minimum distance from IC power pins to decoupling capacitors. These rules help prevent AC analysis failures and validate layout spacing and component placement for effective power delivery.

HyperLynx DRC offers scripting environments for creating your own tailored rules, and you can learn more about these by attending Siemens training. Custom rules can be written in VBScript or Python, and they address complex or proprietary design needs. There are over 100 pre-defined rules that span SI, power integrity (PI), EMI/EMC, and high voltage safety, forming a foundation for effective verification. Siemens offers The Getting Started Workshop to get you up to speed on these quickly.

Summary

PCB verification and sign-off has multiple steps, requiring an understanding of SI, PI and EMI/EMC issues that cause board respins. Using an automated, rule-based verification approach will speed up PCB sign-off, reducing manual effort, and minimizing the risk of respins.

Instead of using visual inspection only once at the end of a project, the automated DRC approach in HyperLynx DRC enables continuous verification during the design process.

Read the entire 27 page White Paper online.

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