All Things Semiconductor!
The need for full wave EM solvers has been creeping into digital design for some time. Higher operating frequencies – like those found in 112G links, lower noise margins – caused by multi level signaling such as in PAM-4, and increasing design complexity – as seen in RDL structures, interposers, advanced connector… Read More
Image RemovedThis week Cadence introduced Legato™ Reliability Solution, intended to address increased challenges in designing high-reliability analog and mixed-signal ICs for automotive, industrial, aerospace and defense applications. … Read More
Chip designers are familiar with the additional physical design checking requirements that were incorporated into flows at advanced process nodes. With the introduction of optical correction and inverse lithography technology applied during mask data generation, and with the extension of a 193nm exposure source to finer… Read More
Consumer electronics demand aggressive mechanical enclosure design — product volume, weight, shape, and connector access are all critical design optimization criteria. Mechanical CAD (MCAD) software platforms are used by product engineers to develop the enclosure definition — the integration of the PCB design… Read More
The diamond jewelry industry encourages customers to focus on the 4C’s — cut, clarity, color, and carats. At the recent PCB Forum conducted by Mentor (a Siemens business) in Santa Clara, I learned that current system design flows also require an emphasis on the 4C’s — collaboration, concurrency, consistency… Read More
My vacation is your worst nightmare. Well, at least that is what the bumper sticker says – it’s referring to Burning Man. It’s well known that among the tens of thousands of people attending this arts festival in Nevada at the end of each Summer there are lots of high tech luminaries. I also have gone many times – not to say that I am a luminary.… Read More
The EDA tool offerings for printed circuit board design commonly address one of three customer markets: (1) the enterprise design team, (2) the product development engineer, and (3) the “maker”. … Read More
I first met John Durbetaki at Intel in Aloha, Oregon and we both had a keen interest in the nascent personal computer industry. My first PC was made by Radio Shack and dubbed the TRS-80 which maxed out at 48KB of RAM. I kept watch on Durbetaki as he left Intel and formed his own company OrCAD in 1985 to serve the needs of PC-based CAD software.… Read More
The prevailing industry trends are clear: (1) PCB and die package designs are becoming more complex, across both mobile and high-performance applications; (2) communication interface performance between chips (and their related protocols) is increasingly demanding to verify; (3) signal integrity and power integrity issues… Read More
In modern electronic industry PCBs are required to accommodate highly dense circuits with large number of components and complex routing spaces. While the complexity is increasing, the time-to-market is decreasing. In such a scenario, there is no other option than to reduce the design time by employing innovative editing options… Read More
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Concerned about IP security threats for your SoCs?
Achronix: Accelerate Data Processing Algorithms using FPGAs with 2D Network-on-Chip
PAVE360: Of SoCs, Digital Twins, and Validating Autonomous Vehicle Behavior
Thermal-induced Reliability Challenges and Solutions for Advanced IC Design
REPLAY: GPU-Powered SPICE: The Way Forward for Analog Simulation
REPLAY: Avoiding CDM (Charged Device Model) ESD Failures
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Concerned about IP security threats for your SoCs?
Achronix: Accelerate Data Processing Algorithms using FPGAs with 2D Network-on-Chip
PAVE360: Of SoCs, Digital Twins, and Validating Autonomous Vehicle Behavior
Thermal-induced Reliability Challenges and Solutions for Advanced IC Design
REPLAY: GPU-Powered SPICE: The Way Forward for Analog Simulation
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REPLAY: How ASIC/SoC Prototyping Solutions Can Help You!
REPLAY: Reusing Your IPs & PDKs Successfully With Cadence® Virtuoso®
REPLAY: Taiwan ESD Workshop Recording
REPLAY: Reduce Risk and Improve Quality of AMS IP’s using AI-Powered Automated Timing Arc Prediction
REPLAY: Text: A Year of Breakfast Bytes by Paul McLellan (Free PDF Version)
REPLAY: Finding Your Way Through Verification
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better_recent_comments-2
Widget_Better_Recent_Comments Instance: 2Array
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[number] => 10
[avatar] =>
[date] => 1
[comment] => 1
[link] => 1
[display_widget_mobile] => 1
[rw_opt] => Array
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Widget_Better_Recent_Comments
Response to IP’s Growing Impact On Yield And Reliability