The Accidental Infrastructure: How Crypto Miners Built the Foundation of the AI BoomMost crypto forty-niners died broke in a warehouse…Read More
From Detection to Safety: Reframing Fault Simulation for Functional SafetyIn the early 1980s, when computer-aided engineering (CAE),…Read More
Driving the Future through the “Talent Empowering Program”: Why TSMC Charity Foundation’s Youth Career Initiative MattersThe future of work will not be shaped…Read More
Foundation IP for Intel 18A: Technical Overview and Why It MattersSynopsys Foundation IP for Intel 18A is a…Read More
WEBINAR: Defacto is Boosting Front-end SoC Design With AI-Powered EDA toolsThe real promise of AI in EDA is…Read More
Now that the dust has settled and I’m out of cronovirus quarantine let’s talk about the Intel and AMD conference calls. Unfortunately, the Intel and AMD marketing teams are still outpacing engineering so it is difficult to write something serious but I will do my best.
Spoiler Alert: Both CEOs disappoint.
First an Intel 10nm update:… Read More
Learning is a never-ending process for design and verification engineers, so outside of reading SemiWiki you likely want to attend at least a few events per year to keep updated, learn something new, attend a workshop, or even present something that has made your IC project work much better than before. Sure, DAC is always a great… Read More
Lam reports nice finish to 2019 and start of 2020
The company reported revenues… Read More
This week the Coronavirus has been escalated to a Global Health Emergency status by the WHO, China extended the Chinese New Year shutdown to 9th February and many companies have implemented a travel ban on business travel to/from China or Asia as well as implementing other business continuity procedures. The last crisis in 2003… Read More
The New Yorks Times’ “The Privacy Project” highlights all that is terrifying about our surveillance economy. We blithely throw away our privacy for the privilege of freely accessing mountains of information about the things we want to buy, the celebrities and teams we follow or support, or to get directions
Hierarchy is nearly universally used in the SoC design process to help manage complexity. Dealing with flat logical or physical designs proved unworkable decades ago. However, there were a few places in the flow where flat tools continued to be used. Mentor lead the pack in the years around 1999 in helping the industry move from … Read More
The next generation FPGAs have been announced, and they are BIG! Intel is shipping its Stratix 10 GX 10M FPGA, and Xilinx has announced its VU19P FPGA for general availability in the Fall of next year. The former is expected to support about 80M ASIC gates, and the latter about 50M ASIC gates. And, to bring this mind-boggling gate… Read More
I’ve always been intrigued by Synopsys’ Certitude technology. It’s a novel approach to the eternal problem of how to get better coverage in verification. For a design of any reasonable complexity, the state-space you would have to cover to exhaustively consider all possible behaviors is vastly larger than you could ever possibly… Read More
Our friends at Threshold Systems have a new class that may be of interest to you. It’s an updated version of the Advanced CMOS Technology class held last May. As part of the previous class we did a five part series on The Evolution of the Extension Implant which you can see on the Threshold Systems SemiWiki landing page HERE. And… Read More
Happy Chinese New Year. Let’s hope the Year of the Rat brings a recovery for the semiconductor industry. The initial signs are all good with many positive indications in the news this week, but let’s hope the Wuhan coronavirus doesn’t derail the recovery by becoming a global emergency. To all those based in China stay safe … Read More
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The Packaging PDK Is the Missing Layer for Co-Packaged Optics