WP_Term Object
(
    [term_id] => 15
    [name] => Cadence
    [slug] => cadence
    [term_group] => 0
    [term_taxonomy_id] => 15
    [taxonomy] => category
    [description] => 
    [parent] => 157
    [count] => 461
    [filter] => raw
    [cat_ID] => 15
    [category_count] => 461
    [category_description] => 
    [cat_name] => Cadence
    [category_nicename] => cadence
    [category_parent] => 157
)
            
14173 SemiWiki Banner 800x1001
WP_Term Object
(
    [term_id] => 15
    [name] => Cadence
    [slug] => cadence
    [term_group] => 0
    [term_taxonomy_id] => 15
    [taxonomy] => category
    [description] => 
    [parent] => 157
    [count] => 461
    [filter] => raw
    [cat_ID] => 15
    [category_count] => 461
    [category_description] => 
    [cat_name] => Cadence
    [category_nicename] => cadence
    [category_parent] => 157
)

Anirudh CadenceLIVE Plays Up Computational Software

Anirudh CadenceLIVE Plays Up Computational Software
by Bernard Murphy on 09-17-2020 at 6:00 am

Cadence has clearly found its groove with Intelligent System Design, something that Lip-Bu reinforced in the CadenceLIVE kickoff keynote on Tuesday, August 11th. Anirudh Devgan, president of Cadence, continued to discuss the theme in his keynote on Wednesday, August 12th with his equally consistent subtitle—”Strength in Computational Software”. His point being that what separates EDA from mass market software is a strong base in numerical mathematical software, in EM and thermal modeling, for example. He offers a bold prediction in asserting that while software has largely been driven by social media over the last 10 years, computational methods will be the big driver over the next 10 years. Anirudh at CadenceLIVE showed how he keeps pushing to prove that point

anirudh cadencelive

Computational Verification and Logistics

Anirudh has an interesting perspective on verification, where there’s always an obsessive focus on optimizing core engines, for formal, simulation, emulation and prototyping. As there should be. These engines must be pushed to deliver the best possible core performance. But verification efficiency isn’t determined solely by that core performance. We spend more time figuring out how to get better coverage, setting engines up, analyzing results, debugging, moving between engines. Also simply running masses of regressions, over and over again. Those are also important steps to optimize. Anirudh views this need as a kind of logistics layer on top of the engines, using the engines as effectively as possible to deliver the total result you really want as quickly as possible.

A good example is the Cadence Palladium/Protium dynamic duo, a close coupling between Palladium emulation for SoC debug and verification and Protium FPFA prototyping for software debug and verification. I know Cadence has done a lot of work to get the linkage between these two as seamless as possible. This is essential given the iterative progress of real verification tasks. Running in prototyping, you find a hardware issue and have to jump back into emulation to debug and then back again when patched. Making those jumps more like jumps and less like week-long interrupts is critical for efficient verification and demands smart computational logistics between engines.

Another example, just announced, is machine learning (ML)-based regression optimization for Xcelium. Mike Gianfagna, a fellow SemiWiki blogger has written on this topic, so I won’t steal his thunder. The main idea is to use ML to compress regression cycles. Again, smart computational logistics optimizing between runs.

Computational Implementation and Logistics

In implementation, Anirudh is clearly proud of the company’s performance in delivering a fully integrated solution. This has become critical‚ especially for 7nm and below. Much tighter integration between engines has become essential. He sees this area equally benefiting from intelligence between the tools. As implementation teams iterate back and forth between steps, the (again smart computational) logistics layer can learn from prior steps to deliver a better optimized result each time, converging on better power and timing solutions faster than might have been possible through conventional flows.

For 3DIC, Anirudh played up Cadence special strengths. One thing I didn’t know is that Cadence Allegro, the PCB solution,  is also the solution of choice for advanced packaging. Now they’re working on connections between Allegro and Innovus and Virtuoso to extend this solution. This puts them in a unique position in the industry to integrate advanced packaging with IC design.

Computational Analysis and Acquisitions

He put a lot of emphasis on analytics and simulations for these solutions. The solutions can span from board to package to die: Cadence Clarity and Celsius, Sigrity and Quartus. Application builders are demanding more optimization across the total solution, in a car for example., requiring this level of integration. Extending their design and analysis reach further, Cadence recently made two acquisitions in RF.  AWR, which provides a comprehensive RF mm wave and microwave implementation platform is now a part of Cadence. Cadence also pulled in Integrand for RFIC electromagnetic extraction for on-chip components. Both of these highly computational portfolio additions are widely popular. Cadence plans to integrate both into the portfolio. Which should be pretty interesting for 5G product builders.

On a quite different note, Cadence also acquired InspectAR, a tool for augmented reality (AR) visualization on top of a PCB. Allegro is now a key area of focus, because of 3DIC. Cadence sees this technology becoming particularly important in that area.

Lots of progress. I really like the continued theme of new big tech announcements each year. Can’t wait for the next one! To learn more about Cadence views on Computational Software, click HERE.


Comments

There are no comments yet.

You must register or log in to view/post comments.