The IO Hub: An Emerging Pattern for System Connectivity in Chiplet-Based DesignsIn chiplet-based design we continue the march of…Read More
Future Horizons Industry Update Webinar IFS 2025The Future Horizons Industry Update Webinar, presented today…Read More
Something New in Analog Test AutomationDigital design engineers have used DFT automation technologies…Read More
MediaTek Develops Chip Utilizing TSMC’s 2nm Process, Achieving Milestones in Performance and Power EfficiencyMediaTek’s first chipset using 2nm technology expected in…Read More
During the SoC Design Session at the just concluded Linley Spring Processor Conference in Santa Clara, Carlos Macian, Senior Director AI Strategy and Products at eSilicon, held a talk entitled ‘Opposites Attract: Customizing and Standardizing IP Platforms for ASIC Differentiation’.
Standardization is key to IP in modern … Read More
This will be one of the more interesting Mentor User Group Meetings now that the Siemens acquisition has fully taken effect and the new management team is in place. The Mentor User Conference is at the Santa Clara Marriott, Santa Clara, California on May 2, 2019 from 9:00 am to 6:00pm.
Remember, in 2017 Siemens acquired Mentor Graphics… Read More
The Washington Auto Show, one of the largest auto shows in the U.S., has a problem and it is a problem shared by other auto shows in the U.S. and around the world. It is a problem that plagues the entire industry and it may spell trouble for connecting with car customers.
I visited the Washington Auto Show last week. The event closed on … Read More
It was the best of times (for stocks)
It was the worst of times (for memory chips)
The disconnect between stock & chip prices
The Venn Diagram of Stocks and Chips
Having been involved with semiconductor and tech stocks for a long time there has always been a loose correlation between the fortunes of the industry and the fortunes… Read More
At the SPIE Advanced Lithography Conference Imec presented several papers on EUV and Veeco presented about etching for EUV masks. I had the opportunity to see the presentations and speak with some of the authors. In this article I will summarize the key issues around EUV based on this research.
EUV is ramping up into high volume 7nm… Read More
It’s no coincidence that the TSMC Symposium is right after the Q1 earnings call. This will allow TSMC to talk more freely and they certainly will, my opinion. It is a very interesting time in the semiconductor industry and TSMC, being the bellwether, can tell us what will happen the rest of the year and give us some 2020 insights.… Read More
Dr. Cheng Wang, Co-Founder and SVP Engineering at Flex Logix, presented the second talk in the ‘AI at the Edge’ session, at the just concluded Linley Spring Processor Conference, highlighting the InferX X1 Inference Co-Processor’s high throughout, low cost, and low power. He opened by pointing out that existing inference solutions… Read More
No, I’m not going to talk about in-memory-compute architectures. There’s interesting work being done there but here I’m going to talk here about mainstream architectures for memory support in Machine Learning (ML) designs. These are still based on conventional memory components/IP such as cache, register files, SRAM and various… Read More
On the Sunday evening at IEDM last year, TechInsights held a reception in which Arabinda Das and Jeongdong Choe gave presentations that attracted a roomful of conference attendees.
This is the second part of the review of Jeongdong’s talk, we covered NAND flash technology in the last post. Jeongdong is a Senior Technical… Read More
If you’re in verification and you don’t know who Paul Cunningham is, this is a guy you need to have on your radar. Paul has risen through the Cadence ranks fast, first in synthesis and now running the verification group, responsible for about a third of Cadence revenue and a hefty percentage of verification tooling in the semiconductor… Read More
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