Synopsys Announces Expanding AI Capabilities and EDA AI LeadershipIn the fast-paced semiconductor industry Synopsys has redefined…Read More
Webinar Preview – Addressing Functional ECOs for Mixed-Signal ASICsAn engineering change order, or ECO in the…Read More
The Rise, Fall, and Rebirth of In-Circuit Emulation (Part 1 of 2)Introduction: The Historical Roots of Hardware-Assisted Verification The…Read More
Tessent MemoryBIST Expands to Include NVRAMThe concept of built-in self-test for electronics has…Read More
The Importance of Productizing AI. Everyday ExamplesKeeping up with the furious pace of AI…Read More
The 2020 VLSI Technology Symposium was held as a virtual conference from June 14th through June 19th. At the symposium Imec gave an interesting paper on Buried Power Rails (BPR) and I had a chance to interview one of the authors, Anshul Gupta.
As logic devices continue to scale down metal pitch is reaching a limit. Imec defines a pitch… Read More
Counting down to the absolutely worst cybersecurity strategies. Sadly, these are all prevalent in the industry. Many organizations have failed spectacularly simply because they chose to follow a long-term path that leads to disaster. You know who you are…
Let’s count them down.
No need for security, … Read More
A funny thing happens when you let car makers make cars and car dealers sell cars – people start buying cars. With the U.S. economy at least partially re-opening nationwide car buyers have returned to the market and, finding a limited supply of new cars and disappointing incentives, have turned, in part, to used cars. This … Read More
Collecting and analyzing semiconductor test data is a subject that holds a special place for me. Developing a factory data collection and analysis system was my first job out of school. The company was RCA, and the factories were in Findlay, Ohio (analog/mixed signal) and West Palm Beach, Florida (digital). There was a pilot… Read More
Thermo-compression bonding is used in heterogeneous 3D packaging technology – this attach method was applied to the assembly of large (12-stack and 16-stack) high bandwidth memory (HBM) die, with significant bandwidth and power improvements over traditional microbump attach.
The rapid growth of heterogeneous… Read More
Two months ago most forecasts called for a decline in the semiconductor market in 2020 as reported in our Semiconductor Intelligence May 2020 newsletter. The outlook changed in June, as the Worldwide Semiconductor Trade Statistics (WSTS) consensus forecast projected 3.3% growth in 2020. This month IC Insights revised its IC
Waving white surrender flag as TSMC dominates-
The quarter was a success but the patient is dying-
Packaging now critical as Moore progress stumbles-
Intel reported a great quarter but weak H2 guidance-
But 7NM slip and “fab lite” talk sends shockwaves-
Intel reported a great quarter beating numbers all around with… Read More
It has become a cliché to start a blog post with a cliché, for example “Chip designs are forever getting larger and more complex” or “Verification now consumes 60% of a project’s resources.” Therefore, I’ll open this post with another cliché: “Designers need to know only one language, but verification engineers must know many.”… Read More
Alchip issued a press announcement recently entitled Alchip Provides Supercomputer Processor Design Support. The release is literally a tour de force of technology, with many advanced design and packaging accomplishments. First, let’s examine the basics of the design.
Preferred Networks, Inc (PFN) is the customer. They … Read More
The revolutionary Intel 8086 microprocessor was introduced 42 years ago this month so I’ve been studying its die.1 I came across two 8086 dies with different sizes, which reveal details of how a die shrink works. The concept of a die shrink is that as technology improved, a manufacturer could shrink the silicon die, reducing… Read More
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Rapidus, IBM, and the Billion-Dollar Silicon Sovereignty Bet