Free and Open Chip Design Tools: Opportunities, Challenges, and OutlookDesigning semiconductor chips has traditionally been costly and…Read More
WEBINAR: Functional ECO Solution for Mixed-Signal ASIC DesignThis webinar, in partnership with Easy-Logic Technology, is…Read More
Taming Concurrency: A New Era of Debugging Multithreaded CodeAs modern computing systems evolve toward greater parallelism,…Read More
The Electronic Design Automation (EDA) industry used to be a bustling bazaar of scrappy startups, along with medium sized companies that dominated a technology space, and big main-line vendors. The annual Design Automation Conference was noisy, hectic, and sprawled over multiple large convention halls. This diversity meant… Read More
This is a topic in which I have a lot of interest, covered in a panel at this year’s DAC; Raúl Camposano chaired the session. I had earlier covered a keynote by Moshe Zalcberg at Europe DVCon late in 2020; he now reprises the topic. Given the incredible pace of innovation and scale in software development these days, I don’t see what we… Read More
The “in-person” portion of the Design Automation Conference (DAC) was recently held in San Francisco. (As several presenters were unable to attend, a “virtual” program is also available.) The presentations spanned a wide gamut – e.g., technical advanced in design automation algorithms; new features in commercial EDA tools; … Read More
Semicon West was Semicon Less….
We attended a “Hybrid” version of Semicon… Read More
We live in the age of big data. No matter how fast and complex modern SoCs are, it all comes down to how quickly data can get in and out that determines the system performance. And, there is a lot of data that today’s systems need to process. Naturally, system interfaces such as PCIe, DDR, HBM, etc., have been evolving rapidly too, to support… Read More
Functional safety has been at the forefront of the electrification of our vehicles with new ADAS features, and the push to reach autonomous driving, while having compliance with the ISO 26262 functional safety standard. I attended the Accellera hosted panel discussion on Monday at DAC, hearing from functional safety panelists… Read More
Standard Cell Scaling
Complex logic designs are built up from standard cells, in order to continue to scale logic we need to continually shrink the size of standard cells.
Figure 1 illustrates the dimensions of a standard cell.
Figure 1. Standard Cell Dimensions.
From figure 1 we can see that shrinking standard cell sizes requires… Read More
Monday at DAC this year started off on a very optimistic note as Joe Sawicki from Siemens EDA presented in the Pavilion on the topic of Digitalization, a frequent theme in the popular press because of the whole Work From Home transition that we’ve gone through during the pandemic. Several industries are benefiting from the… Read More
Thermal modeling has become a hot topic for designers of today’s high-speed circuits and complex packages. This has led to the adoption of better and more sophisticated thermal modeling tools and flows as exemplified in this presentation by Micron at the IDEAS Digital Forum. The presentation is titled “Thermal Aware Memory Controller… Read More
Edge computing is a model in which data, processing and applications are concentrated in devices at the network rather than existing almost entirely in the cloud.
Edge Computing is a paradigm that extends Cloud Computing and services to the of the network, similar to Cloud, Edge provides data, compute, storage, and application… Read More
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Intel’s Pearl Harbor Moment