From Simulink to High-Quality RTL using High-Level Synthesis — The Design Methodology

Register For This Web Seminar Online - Jul 14, 2020 10:00 AM - 11:00 AM US/Pacific Register Overview Nowadays many ASIC and FPGA design projects start with a Simulink reference model. The traditional path from an abstract floating-point Simulink model to high-quality RTL code is long and often requires multiple manual coding stages, several designers …

Stratus HLS (High Level Synthesis) Seminar Series: [Part 1] Let’s learn the basics of high-level synthesis

Online

Date: August 31, 2023 (Thursday) 15:00-16:00 Organizer: Cadence Design Systems Japan, Innotech Co., Ltd. IC Solution Division Cost: Free Venue: Online (Zoom webinar) * It is also possible to participate from a web browser. We recommend using Google Chrome, Firefox, or Chromium Edge. Registration deadline: Wednesday, August 30, 16:00 In recent years, LSI design has …

Stratus HLS (High Level Synthesis) Seminar Series [Part 2]: SystemC simulation and debugging

Online

Date: September 15, 2023 (Friday) 15:00-16:00 Organizer: Cadence Design Systems Japan Innotech Co., Ltd. IC Solution Division Cost: Free Venue: Online (Zoom webinar) * It is also possible to participate from a web browser. We recommend using Google Chrome, Firefox, or Chromium Edge. Registration deadline: September 14th (Thu) 16:00 REGISTER HERE In recent years, LSI …

Stratus HLS (High Level Synthesis) Seminar Series: [Part 4] Result analysis and microarchitecture exploration

Online

Date and time: October 13, 2023 (Friday) 15:00-16:00 Sponsor: Japan Cadence Design Systems, Innotek Co., Ltd. IC Solution Headquarters Cost: Free Venue: Online (Zoom webinar) *You can also participate from a web browser. We recommend using Google Chrome, Firefox, or Chromium Edge. Registration deadline: October 12th (Thursday) 16:00 In recent years, as LSI designs become …

Stratus HLS (High Level Synthesis) Seminar Series: [Part 5] Verification of high-level synthesis RTL and Stratus integration flow

Online

Date and time: Friday, November 10, 2023 15:00-16:00 Sponsor: Japan Cadence Design Systems, Innotek Co., Ltd. IC Solution Headquarters Cost: Free Venue: Online (Zoom webinar) *You can also participate from a web browser. We recommend using Google Chrome, Firefox, or Chromium Edge. Registration deadline: November 9th (Thursday) 16:00 In recent years, as LSI designs become …