Semiwiki 400x100 1 final
WP_Term Object
(
    [term_id] => 157
    [name] => EDA
    [slug] => eda
    [term_group] => 0
    [term_taxonomy_id] => 157
    [taxonomy] => category
    [description] => Electronic Design Automation
    [parent] => 0
    [count] => 4047
    [filter] => raw
    [cat_ID] => 157
    [category_count] => 4047
    [category_description] => Electronic Design Automation
    [cat_name] => EDA
    [category_nicename] => eda
    [category_parent] => 0
)
EDA
Posted on by Paul McLellan

Jasper: Negronis on tap

Jasper: Negronis on tap
by Paul McLellan on 08-22-2013 at 6:26 pm
Categories: EDA

Did you know that Jasper’s Corner Tap in San Francisco serves Negronis on tap? It’s true. They also have Hanky Panky on tap, which is a Negroni with the Campari replaced with Fernet (which everyone pronounces as Frenet despite it being…well…wrong). And here’s another thing you probably didn’t know: San Francisco itself accounts for over 25% of all US consumption of Fernet. My daughter is a bar manager, I learn all kinds of stuff.

Anyway, talking of Jasper (this has to be the worst segue I’ve ever written) I doubt that there will be Negronis on tap at the Jasper User Group meeting but I’m sure that they will have free beer and wine as usual at the cocktail reception on October 22nd. The Jasper User Group (JUG) will be on October 22nd and 23rd. So those will be JUG wines then. It will be in the Cypress Hotel in Cupertino where it has been for the last few years.

I can’t tell you who the keynote is going to be yet because it hasn’t finally been confirmed, but last year it was Intel. Yes, that would be the same Intel that never endorses EDA companies in any way shape or form. If you missed my blog on the history of formal verification at Intel last year then it is still around.

But one of the other presenters could be you. Well, you have to be a Jasper user, of course (or maybe from Intel) but as in previous years, JUG will consist mainly of Jasper’s customers talking about their own experiences rather than a lot of Jasper marketing Powerpoint. Presentations can be from 30 minutes to an hour long.

Topics of interest include:

  • designer-based verification
  • low-power verification
  • security
  • sequential equivalence checking
  • architecture validation
  • SoC integration
  • RTL development
  • property synthesis
  • post-silicon debug
  • verification IP
  • formal property verification

If you are interested in presenting, then contact Rob van Blommestein robvb@jasper-da.com. Proposals are due by September 21st and then the final presentations by October 18th.

New this year there are “birds of a feather” discussions during breakfast hosted by power users at 8.30-9.30am each morning. Session topics are:

  • proof grid
  • property synthesis
  • clock and reset setup and verification
  • IP-XACT
  • low power verification
  • AMBA Proofkit certification
  • Protocol verification
  • security path verification

Details on those Jasper Negronis here. More details about the Jasper User Group are here. Register for the Jasper User Group here.

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