When Lindu Krishna joined Axiomise after a career break, she wasn’t just relearning technical concepts – she was rebuilding her confidence, redefining what it means to be a woman engineer and quietly becoming the person who can take ownership of complex formal verification blocks. Backed by a culture where nobody sits … Read More
Is formal verification ready for general use or do you need a PhD to use it? Larger companies continue to recruit formal PhDs into their verification teams while other less-well-qualified engineers seem reluctant to go beyond simplified formal “apps”.
So, what is the truth of the matter? Can non-specialist… Read More
This interview presents the first steps of Robert Simpson (R.S.), a Maths graduate who found an unexpected, but natural home in Formal Verification (FV) at Axiomise. Drawn by a desire to apply rigorous logic to real-world problems, he shares how abstract mathematical thinking translates into ensuring hardware correctness … Read More
How do I know when my hardware design is correct and meets all of the specifications? For many years the answer was simple, simulate as much as you can in the time allowed in the schedule and then hope for the best when silicon arrives for testing. There is a complementary method for ensuring that hardware design meets the specifications… Read More
Generative AI has transformed software development, enabling entire applications to be built in minutes. But despite similar progress in AI-generated RTL, hardware verification remains a major bottleneck. RTL can be produced quickly, yet proving its correctness is extraordinarily difficult. This has revived a long-standing… Read More
It’s now difficult to remember when we didn’t reuse our own IP and didn’t have access to extensive catalogs of commercial IP. But reuse comes with a downside – without modification we can’t finetune IP specs to exactly what we want in a current design. We’re contractually limited in how we can adapt commercial IP, however vendors … Read More
At the Design Automation Conference (DAC) 2025 in San Francisco, LUBIS EDA returns as an exhibitor to showcase its latest innovations in formal verification automation, helping semiconductor teams move faster and with more confidence through the most complex verification challenges.
LUBIS EDA is a fast-growing EDA startup… Read More
Formal verification methods are being adopted at a fast pace as a complement to traditional verification methods like functional simulation for IP blocks in SoC designs. I had a video meeting with Max Birtel, co-founder of LUBIS EDA and learned more about their history, products and vision. This company started recently in 2020… Read More
A growing trend in system design is the use of multiple ICs mounted in advanced packages, especially in high-performance computing and AI. These modern packages now integrate multiple ICs, often with high-bandwidth memory (HBM), resulting in hundreds of thousands of connections that need proper verification. Traditional… Read More
Bing Xue is a dedicated Formal Verification Engineer at Axiomise, with a strong academic and professional foundation in hardware verification. He completed his PhD at the University of Southampton, where he conducted cutting-edge research on Formal Verification, RISC-V, and the impact of Single Event Upsets. Bing is … Read More
