Banner 1 800X100 (1) (1)
WP_Term Object
(
    [term_id] => 178
    [name] => IP
    [slug] => ip
    [term_group] => 0
    [term_taxonomy_id] => 178
    [taxonomy] => category
    [description] => Semiconductor Intellectual Property
    [parent] => 0
    [count] => 2056
    [filter] => raw
    [cat_ID] => 178
    [category_count] => 2056
    [category_description] => Semiconductor Intellectual Property
    [cat_name] => IP
    [category_nicename] => ip
    [category_parent] => 0
    [is_post] => 
)
IP

Semiconductor Intellectual Property

Posted on

PCI Express in Depth – Physical Layer

PCI Express in Depth – Physical Layer
by Luigi Filho on 08-23-2020 at 10:00 am
Categories: IP

PCI Express in Depth Physical Layer

In the last article, I wrote about the PCIe basic concepts. This article will reach the physical layer of the PCIe standard.

The lowest PCI Express architectural layer is the Physical Layer. This layer is responsible for actually sending and receiving all the data to be sent across the PCI Express link. The Physical Layer interacts… Read More

Posted on

PCI Express in Depth

PCI Express in Depth
by Luigi Filho on 08-23-2020 at 8:00 am
Categories: IP

PCI Express in Depth

This is another post that was requested by a user, and as always i’ll do my best to put in a few articles the basic information that you’ll need to understand how it works at depth level.

PCI Express (or PCIe) is a high-speed serial computer expansion bus designed to replace the older PCI, PCI-X and AGP standards.

The first… Read More

Posted on

ARC Processor Virtual Summit!

ARC Processor Virtual Summit!
by Daniel Nenni on 08-21-2020 at 6:00 am
Categories: Events, IP, Synopsys

ARC Processor Virtual Summit 2020

The ARC Processor has a rich history. Originally named the Argonaut RISC Processor, it was designed for the Nintendo Game Systems in the 1990s. Argonaut Technologies Limited later became ARC International. My first intimate exposure to ARC was in 2009 when Virage Logic acquired ARC. A year later Virage was acquired by Synopsys… Read More

Posted on

Major Hardware Security Initiative Adds Tortuga Logic

Major Hardware Security Initiative Adds Tortuga Logic
by Bernard Murphy on 08-20-2020 at 6:00 am
Categories: IP, Security, Tortuga Logic

cybersecurity 2 min

You can update ..Generally, I’m a fan of letting market forces figure out best solutions to whatever evolving needs we may have, but I’m enough of a realist to accept that’s not a workable answer to every need. Some problems need a top-down fix. However, we can’t expect policymakers or industry consortia to create compliance demands… Read More

Posted on

Interconnect Basics: Wires to Crossbar to NoC

Interconnect Basics: Wires to Crossbar to NoC
by Bernard Murphy on 08-18-2020 at 6:00 am
Categories: Arteris, IP
2 Comments

rats nest min

To many of us, if we ever think about interconnect on an SoC, we may think delay, power consumption, congestion, that sort of thing. All important points from an implementation point of view, but what about the functional and system implications? In the early days, interconnect was very democratic, all wires more or less equal, … Read More

Posted on

RISC-V SDKs, from IP Vendor or a Third Party?

RISC-V SDKs, from IP Vendor or a Third Party?
by Bernard Murphy on 08-12-2020 at 6:00 am
Categories: EDA, IP, RISC-V, Siemens EDA

RISC V min

Like many of us, I’m a fan of open-source solutions. They provide common platforms for common product evolution, avoiding a lot of unnecessary wheel re-invention, over and over again. Linux, TensorFlow, Apache projects, etc., etc. More recently the theme moved into hardware with OpenCores and now the RISC-V ISA. All good stuff.… Read More

Posted on

CEO Interview: Ted Tewksbury of Eta Compute

CEO Interview: Ted Tewksbury of Eta Compute
by Daniel Nenni on 08-11-2020 at 10:00 am
Categories: CEO Interviews, Eta Compute, IP

Ted Tewksbury President CEO Eta Compute

Tell me about Eta Compute’s vision? 
We envision a world where intelligent devices at the network edge make everyones’ lives safer, healthier, more comfortable, and convenient without sacrificing privacy and security.

How do you hope to achieve this? 
We achieve this by providing the lowest power and most energy efficient machine… Read More

Posted on

New Processor Helps Move Inference to the Edge

New Processor Helps Move Inference to the Edge
by Tom Simon on 08-10-2020 at 10:00 am
Categories: AI, IP, Mixel

MIPI IP from Mixel

Many of the most compelling applications for Artificial Intelligence (AI) and Machine Learning (ML) are found on mobile devices and when looking at the market size in that arena, it is clear that this is an attractive segment. Because of this, we can expect to see many consumer devices having low power requirements at the edge with… Read More

Posted on

WEBINAR: Security Verification of Root of Trust for Xilinx

WEBINAR: Security Verification of Root of Trust for Xilinx
by Bernard Murphy on 08-07-2020 at 6:00 am
Categories: FPGA, IP, Security, Tortuga Logic, Xilinx

root of trust min

Tortuga Logic is hosting a webinar on Tuesday, August 18th from 12 to 1PM PDT, in which Xilinx will present their experiences in using the Tortuga Logic Radix-S and Radix-M products for security verification of root of trust in their advanced SoC FPGAs. REGISTER HERE to attend the webinar.

SECURITY CHALLENGES
In general security… Read More

Posted on

All-In-One Extreme Edge with Full Software Flow

All-In-One Extreme Edge with Full Software Flow
by Bernard Murphy on 08-04-2020 at 2:00 pm
Categories: AI, Eta Compute, IoT, IP

Obstacles to Edge AI min

What do you do next when you’ve already introduced an all-in-one extreme edge device, supporting AI and capable of running at ultra-low power, even harvested power? You add a software flow to support solution development and connectivity to the major clouds. For Eta Compute, their TENSAI flow.

The vision of a trillion IoT… Read More