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Today it was announced that Synopsys is acquiring SpringSoft for $406 million dollars ($12.2B Taiwanese). Coincidentally, I was in SpringSoft’s US office yesterday to talk about how Laker is being used for 20nm design. More of that later. But there was certainly nothing to indicate that anyone there was expecting this.… Read More
Ken Brockof Synopsys presented on how to optimize your SoC design for low power at 40nm, 28nm and 20nm nodes in a webinar today. Ken and I both worked together at Silicon Compilers back in the late 1980’s, the best EDA/IP company that I’ve had the pleasure to join.
The webinar made a brief mention of 14nm and FinFETS but … Read More
Josefina Hobbs, a solutions architect at Synopsys, demonstrates protocol debug made easy using the Synopsys Protocol Analyzer. This gives users a graphical view of the transfers, transaction, packets and handshaking of a protocol. The video also shows the integration of Synopsys Protocol Analyzer with SpringSoft’s… Read More
At Intel we used to hand-craft every single transistor size to eek out the ultimate in IC performance for DRAM and graphic chips. Today, there are many libraries that you can choose from for an SoC design in order to reach your power, speed and area trade-offs. I’m going to attend a Synopsys webinar on August 2nd to learn more … Read More
I attended the Synopsys webinar today for a tool called Custom Explorer Ultra (CXU). Product details on the Synopsys web site are here. The CXU tool would be used by AMS designers that want to setup, control and view results from simulators like HSPICE, CustomSim or VCS on transistor-level and AMS designs.… Read More
As 2D device scaling becomes impractical, 3D-IC integration is emerging as the natural evolution of semiconductor technology; it is the convergence of performance, power and functionality. Some of the benefits of 3D-IC, such as increasing complexity, improved performance, reducing power consumption and decreasing footprints,… Read More
If you are in Asia then the Synopsys user group SNUG is coming up, soon in Japan and next month in China. Actually if you are in India I’m afraid you already missed it last month, just after DAC.
SNUG Japan is on 12th July in a couple of days time from 10am until 8pm in Tokyo.
In China there are 3 between August 14th and 21st
See how Synopsys’ advanced analog verification solution can dramatically increase your verification productivity with CustomExplorer Ultra, along with CustomSim and CustomSim-VCS. CustomExplorer Ultra is a comprehensive simulation and debug environment for analog and mixed-signal design verification.
Web … Read More
LLI Specification has been officially released by the MIPI Alliance, at the occasion of the Mobile World Congress in Barcelona, this year. As indicated by the name, the round-trip latency of the LLI inter-chip connection is fast enough for a mobile phone modem to share an application processor’s memory while maintaining… Read More
Lunch on Tuesday at DAC was sponsored by the IPL Alliance and thankfully this year they skipped the attempt at humor and focused on interoperable PDKs. Presenting companies include: Synopsys, Dongbu HiTek, TowerJazz, X-FAB and Si2. Having both OpenPDK and iPDK on the same platform does sound like a peaceful co-existence to me,… Read More
Podcast EP141: The Role of Synopsys High-Speed SerDes for Future Ethernet Applications
Podcast EP148: The Synopsys View of High-Performance Communication and the Role of Chiplets
Podcast EP152: An Informal Conversation with Aart de Geus on AI and Multi-Die at SNUG
Podcast EP169: How Are the Standards for the Terabit Era Defined?
Podcast EP178: An Overview of Advanced Power Optimization at Synopsys with William Ruby
Podcast EP185: DRAM Scaling, From Atoms to Circuits with Synopsys’ Dr. Victor Moroz
Podcast EP188: The New Demands for Memory Design and the Synopsys Approach with Anand Thiruvengadam
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