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SoC Design Closure Just Got Smarter

SoC Design Closure Just Got Smarter
by Daniel Payne on 11-08-2022 at 10:00 am

iterations min

Near the end of any large SoC design project, the RTL code is nearly finished, floorplanning has been done, place and route has a first-pass, static timing has started, but the timing and power goals aren’t met. So, iteration loops continue on blocks and full-chip for weeks or even months. It could take a design team 5-7 days… Read More


Your Symmetric Layouts show Mismatches in SPICE Simulations. What’s going on?

Your Symmetric Layouts show Mismatches in SPICE Simulations. What’s going on?
by Maxim Ershov on 11-07-2022 at 6:00 am

Figure1 6

This Diakopto paper discusses for the first time, a new effect – a false electrical mismatch in post-layout simulations for perfectly symmetric nets. This effect is caused by the difference in distributions of parasitic coupling capacitors over the nodes of parasitic resistor networks, even for symmetric nets. This, in turn,… Read More


Pushing Acceleration to the Edge

Pushing Acceleration to the Edge
by Dave Bursky on 11-04-2022 at 6:00 am

performane table siemens eda

As more AI applications turn to edge computing to reduce latencies, the need for more computational performance at the edge continues to increase. However, commodity compute engines don’t have enough compute power or are too power-hungry to meet the needs of edge systems. Thus, when designing AI accelerators for the edge, Joe… Read More


Why Use PADS Professional Premium for Electronic Design

Why Use PADS Professional Premium for Electronic Design
by Daniel Payne on 11-01-2022 at 6:00 am

PADS Designer min

My IC design career started just a few years before PADS got started in 1985 with a DOS-based tool for PCB design. A lot has changed since then, as PADS was acquired by Mentor Graphics in 2001, and continued to grow under Siemens EDA, now with four versions to choose from, where the top version is called PADS Professional Premium:

  • PADS
Read More

Are EDA companies failing System PCB customers?

Are EDA companies failing System PCB customers?
by Rahul Razdan on 10-31-2022 at 6:00 am

figure1 5

Electronic Design Automation (EDA) is a critical industry which enables the development of electronic systems.  Traditionally, EDA has been bifurcated into two distinctive market segments: Semiconductor and Systems (PCB).   If one were to look at the EDA industry in the early 1970’s, one would find significant capabilities… Read More


Machine Learning Applications in Simulation

Machine Learning Applications in Simulation
by Daniel Nenni on 10-27-2022 at 6:00 am

Xcelium ML min

Machine learning (ML) is finding its way into many of the tools in silicon design flows, to shorten run times and improve the quality of results. Logic simulation seemed an obvious target for ML, though resisted apparent benefits for a while. I suspect this was because we all assumed the obvious application should be to use ML to refine… Read More


Bespoke Silicon Requires Bespoke EDA

Bespoke Silicon Requires Bespoke EDA
by Michiel Ligthart on 10-26-2022 at 10:00 am

Bespoke EDA

When I first heard the term ‘bespoke silicon,’ I had to get my dictionary out. Well versed in the silicon domain, I did not know what bespoke meant. It turns out to be a rather old-fashioned term for tailor made and seems to be very much British English. The word dates from 1583 and is the past participle of bespeak, according… Read More


Post-Silicon Consistency Checking. Innovation in Verification

Post-Silicon Consistency Checking. Innovation in Verification
by Bernard Murphy on 10-26-2022 at 6:00 am

Innovation New

Many multi-thread consistency problems emerge only in post-silicon testing. Maybe we should take advantage of that fact. Paul Cunningham (Senior VP/GM, Verification at Cadence), Raúl Camposano (Silicon Catalyst, entrepreneur, former Synopsys CTO and now Silvaco CTO) and I continue our series on research ideas. As always,… Read More


Higher-order QAM and smarter workflows in VSA 2023

Higher-order QAM and smarter workflows in VSA 2023
by Don Dingee on 10-25-2022 at 10:00 am

Higher-order QAM and smarter workflows in a 5G NR example from the Keysight 89600 VSA

3GPP Release 17 and 802.11be (Wi-Fi 7) extend modulation complexity, raising the bar for conformance testing and test instrumentation to new levels. The latest release of Keysight PathWave 89600 Vector Signal Analysis 2023 (VSA 2023) software takes on higher-order QAM and smarter workflows, many customer-requested, for … Read More


The Corellium Experience Moves to EDA

The Corellium Experience Moves to EDA
by Lauro Rizzatti on 10-25-2022 at 6:00 am

Corellium SemiWIki

Bill Neifert invited me to join him on Zoom recently to talk about his move to Corellium, a company known within the DevSecOps (development, security, operations) market. Developers and security groups use its virtualization technology to build, test, and secure mobile and IoT apps, firmware, and hardware.

Not knowing much … Read More