800x100 Efficient and Robust Memory Verification (2)

Synopsys Acquires Virage Logic!

Synopsys Acquires Virage Logic!
by Daniel Nenni on 06-10-2010 at 6:16 pm

Overshadowing the acquisition of Denali by Cadence, Synopsys, the #2 semiconductor IP provider acquires Virage Logic, the #3 IP provider. Virage brings the #1 embedded SRAM, #1 BIST, #1 Logic Libraries, #1 DDR, #1 NVM, the ARC CPU cores and audio/video interface technology, and all the AMS IP from the NXP acquisition.

Under theRead More


TSMC Unveils First Ever AMS Reference Flow!

TSMC Unveils First Ever AMS Reference Flow!
by Daniel Nenni on 06-08-2010 at 9:17 pm

As a quick follow-up to my blog TSMC Extends Open Innovation Platform, TSMC today announced the Analog/Mixed Signal Reference Flow 1.0., another key collaborative component of TSMC’s Open Innovation Platform™.

The TSMC AMS Design Flow 1.0’s design package is integrated seamlessly on top of the 28nm interoperable process design… Read More


TSMC Extends Open Innovation Platform

TSMC Extends Open Innovation Platform
by Daniel Nenni on 06-07-2010 at 9:24 pm

TSMC today extended one of the most effective semiconductor design enablement initiatives the semiconductor world has ever seen, the Open Innovation Platform (OIP). Morris Chang coined the term “OIP” himself in 2008, but the effort itself is 10+ years old with a collective cost > .5B$. My other blogs on topic include: TSMC Read More


TSMC versus GlobalFoundries: Semiconductor Design Enablement!

TSMC versus GlobalFoundries: Semiconductor Design Enablement!
by Daniel Nenni on 06-01-2010 at 9:00 pm


As mentioned in previous blogs, design enablement is a key enabler to fabless semiconductor design and manufacture, without question. The purpose of this blog (in 500 words) is to compare and contrast two very different design enablement strategies and engage the semiconductor community in a meaningful discussion.

The GlobalFoundry… Read More


Semiconductor Capacity Shortages 2010

Semiconductor Capacity Shortages 2010
by Daniel Nenni on 05-31-2010 at 7:25 pm

In a previous blog, Black Friday and the Predicted Semiconductor Shortages, I reported that total semiconductor manufacturing capacity is shrinking as older fabs close and new ones ramp up even slower than expected, resulting in a record reduction of total wafer capacity and silicon allocation starting in 2010. DRAM shortages… Read More


TSMC OIP vs CDNS OIP Analysis

TSMC OIP vs CDNS OIP Analysis
by Daniel Nenni on 05-28-2010 at 9:04 pm

Launched in April 2008, the TSMC OIP initiative is a collaborative strategy aimed at breaking down the barriers of semiconductor design enablement in order to reduce waste and increase the profitability of the industry as a whole.

The TSMC Open Innovation Platform promotes timeliness-driven innovation amongst the semiconductorRead More


450mm Semiconductor Manufacturing Debate

450mm Semiconductor Manufacturing Debate
by Daniel Nenni on 05-23-2010 at 2:39 pm


This blog posting is sponsored by EVA airlines, as I’m in the EVA executive lounge eating free food (I blog for food). “Fly EVA, the lesser of evils for Taiwan air travel!” EVA Air has a perfect safety record in 9 years of operation, China Air on the other hand has the worst safety record in the industry!

This blog was inspired by one of … Read More


2010 Semiconductor Foundry Update: Consolidation!

2010 Semiconductor Foundry Update: Consolidation!
by Daniel Nenni on 05-16-2010 at 6:46 pm

It has been an interesting month in the semiconductor business. Record revenues, profits, aggressive expansion plans, something we have not seen before and may not see again. Let’s start in Taiwan then move to Silicon Valley, Upstate New York, China, and Korea, with a look at: financials, capacity, and consolidation.

TSMC and… Read More


Cadence EDA360 Redux!

Cadence EDA360 Redux!
by Daniel Nenni on 05-09-2010 at 9:02 pm

“Cadence Design Systems, Inc. (NASDAQ: CDNS), the global leader in EDA360………”

Of course, why wouldn’t Cadence be the global leader in something they just made up? As a follow-up to my yawningly successful blog Cadence EDA360 Manifesto:

One of the problems I have with EDA360 is the fear, uncertainty, and doubt (FUD) it attempts … Read More


Cadence EDA360 Manifesto

Cadence EDA360 Manifesto
by Daniel Nenni on 05-02-2010 at 8:54 pm

EDA360 is said to be a blueprint or high-level vision for the EDA industry and not a Cadence specific document, based on the challenges that customers are experiencing. What EDA36o really is, is a manifesto, a public declaration of intentions, opinions, objectives, or motives, issued by a specific organization. The question … Read More