NanGate got started in 2004 by a group of engineers from Vitesse Semi and Intel. The technology and market idea was to address and solve the inherent shortcomings of standard cell based design as compared to full custom. Anyone having tried to push the performance of a standard cell design knows the frustration… if only I had a better… Read More
TSMC’s CoWoS Capacity to Double by 2028—and Rivals Will Still Win OrdersTSMC reportedly plans to double its Chip-on-Wafer-on-Substrate capacity…Read More
The Invisible Bottleneck Is Costing You Time You Can't Get BackBy Joel Jorgensen, FlowAccel. The 2026 Siemens EDA…Read More
Arm targets the agentic AI era with new edge, cloud and robotics platformsArm is expanding its computing platform for an…Read More
Rethinking AI Chips: How VSORA Redesigned the Hardware That Runs AIInstead of tweaking existing designs, VSORA built an…Read MoreBats about DAC!
DAC 2013 is closing in fast now…and if you haven’t made your plans for what you want to see and do, you’d better get going! Of course, I’m happy to help you out with a few suggestions…starting with that most important objective—conference swag. Stop by the Mentor Graphics booth (#2046, for those of you who actually look at your floor… Read More
Network-on-Chip is the backbone of Application Processor and LTE Modem
I have mentioned NoC adoption explosion during the last two years, illustrated by the huge revenue growth of Arteris. This trend is now confirmed in the fastest moving segments, the Application Processors (AP) and LTE Modem for mobile applications. In fact, Arteris FlexNoC has been integrated in the majority of AP and LTE Modem… Read More
Do You Need to Worry About Soft Errors?
As we get down to smaller and smaller process nodes, the problem of soft errors becomes increasingly important. These soft errors are caused by neutrons from cosmic rays, alpha particles from materials used in manufacture and other sources. For chips that go into systems with high reliability this is not something that can be ignored.… Read More
TSMC Goes To DAC
TSMC will be at DAC again this year, of course. The main event, as last year, is the OIP Theater where TSMC’s partners come and present their collaboration stories. Here is the schedule:… Read More
IC Place and Route Perspective from Users at DAC
One of the most useful ways to learn about an EDA tool is to talk with other users that have experience with that tool. IC Place and Route tools are complex and yet necessary to implement every SoC designed today, so at DAC in just two weeks you have a chance to hear first-hand from several P&R tool users. To get a better idea about these… Read More
Layout-based ESD Check Methodology with Fast, Full-chip Static and Macro-level Dynamic
Nvidia designs some of the most powerful graphics chips and systems in the world, so I’m always eager to learn more about their IC design methodology. This week I’ve had the chance to talk with Ting Ku, Director of Engineering at Nvidia about his DAC talkin the Apache booth in exactly two weeks from today. Registration… Read More
The Only DM Platform Integrated with All Major Analog and Custom IC Design Flows
As I have mentioned before, Cliosoft is the biggest little company in EDA with the most talked about products on SemiWiki. At DAC, ClioSoft will introduce integrated SOS design management (DM) solutions providing revision control, design management and multi-site team collaboration for Aglient Technologies’ Advanced Design… Read More
Transistor-Level Update from Cadence at DAC
My 8 years as an IC circuit designer were at the transistor-level, so if that interests you as well then consider what there is to see from Cadence at DAC this year. IC design technology is changing quickly, so keeping up to date is important for your job security and continual education goals.
Here’s what I would recommend attending… Read More
Samsung’s Life of Pi @ Apache @ DAC
Last week I talked to Eileen You of Samsung-SSI to get a preview on what they will be talking about at Apache’s customer theater at DAC. Their presentation is titledThe Life of PI: SoC Power Integrity from Early Estimation to Design Sign-off. The ‘PI’ stands for Power Integrity.
Samsung-SSI’s operations… Read More



ASML and TSMC’s 12-Inch Photomask Initiative: Technical Significance