Innova at the 2024 Design Automation ConferenceDesign projects are becoming more and more complex.…Read MoreDefacto at the 2024 Design Automation ConferenceDefacto continues to confirm its SoC Compiler as…Read More
Codasip at the 2024 Design Automation ConferenceCodasip will be demonstrating its new L110 core…Read More
Siemens Hardware-Assisted Verification at the 2024 Design Automation ConferenceVisitors to Siemens’ booth (#2521) at the 61st…Read MoreVerific at the 2024 Design Automation ConferenceVerific Design Automation will host two well-funded AI…Read More
While Intel is doing victory laps in the race to a 3D transistor (FinFet) @ 22nm, TSMC is in production with 3D IC technology. A 3D IC is a chip in which two or more layers of active electronic components are integrated both vertically and horizontally into a single circuit. The question is which 3D race is more important to the semiconductor… Read More
During the early 2000’s, when OEM starting to question the use of LVDS to interface with display devices, two standards has emerged: High-Definition Multimedia Interface (HDMI) and DisplayPort. HDMI has been developed by silicon Image, surfing on the success of Digital Video Interface (DVI), and was strongly supported… Read More
The latest edition of GSA Forum has an article by Aveek Sarkar of Apache on system design for emerging market needs. The BRIC (Brazil, Russia, India, China) type countries are characterized by a small rich segment, a large and growing middle class and a large poor segment. One big trend is that smart phone use is expanding very fast.… Read More
Probably everyone knows that openAccess is a layout database. It was originally developed at Cadence (called Genesis) but has since been transferred to Si2. Strictly speaking, openAccess is actually an API and the database is a reference implementation. The code is licensed under a sort of halfway to open-source: you can use … Read More
With the adoption of the 32/28 nm process node, some significant new challenges in digital routing arise—including complex design rule checking (DRC) and design for manufacturing (DFM) rules, increasing rule counts, very large (1 billion transistor) designs. To meet quality, time-to-market, and cost targets, design teams… Read More
After the mega IP acquisitions last year by Cadence (Denali) and Synopsys (Virage) a lot of people are wondering what is next for the commercial Semiconductor IP market. Let me offer my opinion as a person who works closely with foundries and their top customers and the opinion of Dr. Eric Esteve, an expert on interface IP.
The commercial… Read More
Intro
On Monday evening I talked with Linda Fosler, Director of marketing for the DSM Division at Mentor about what’s new at DAC this year in circuit simulation and IC layout tools.
Notes
IC Station – old name for IC layout tools
Eldo – Eldo Classic- Cell characterization
– ST is the early customer and teaching customer,… Read More
Intro
Across the aisle from the Mentor booth at DAC sat a DRC tool competitor to Calibre. I received an update from Randy Smith of Polyteda on Wednesday afternoon, my last EDA vendor of the week.
Ravi Ravikumar, Randy Smith
Notes
Randy Smith – CEO (February 2011) [former founder is gone]- 1979 at HP developing internal tools
–… Read More
Intro
Massimo Sivilotti, Ph.D of Tanner EDA showed me their 3D field solver in the HiPer PX extraction tool at DAC last week.
Notes
Tool Suites – schematics, layout, SPICE simulation, DRC/LVS
– HiPer PX: 3D Field solvero Layers, dielectrics,
o Finite element analysis
o Boundary element methods
o 2D mode for pattern matching… Read More
Intro
Show me what has changed in my RTL or Schematic since the last time I looked. This task is now automated by Cliosoft with their new hierarchical tool called Visual Design Difference (VDD). Srinath showed me what was new for DAC.
Srinath Anantharaman
Notes
LSI, STMicro – use DesignSync for their DM but use VDD for seeing visual… Read More
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