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CHERI webinar banner
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Codasip at the 2024 Design Automation Conference

Codasip at the 2024 Design Automation Conference
by Daniel Nenni on 06-20-2024 at 9:00 am

DAC 2024 BannerCodasip will be demonstrating its new L110 core alongside Codasip Studio Fusion at #61DAC. Codasip L110 delivers up to 50% improvements in performance per watt and 20% smaller code size compared to similar cores in the market. ​The core offers extensive configurability, allowing different area/performance trade-off levels, and support for standard RISC V code-size extensions. Additionally, the L110 is fully customizable allowing designers to extend the processor to achieve massive PPA improvements to differentiate their products. Designed by the Codasip team using Codasip Studio Fusion, L110 is ideal for small-area, low-power applications, such as state machine replacements, sensor controllers, and IoT edge.

Codasip Studio has been the toolset to generate both the RTL and the software development tools from one processor model for years. The latest version, Codasip Studio Fusion, improves this fundamental capability and adds a layer of segmentation. You can configure the core from set options, create custom instructions within set bounds, or design freely.

Codasip will be showcasing both of these new products at the 2024 DAC show through the, Anomaly Detection in Near-Sensor Embedded Devices Demo. Which enables for AI/DSP on Tiny Processors optimized through Bounded Customization.

Codasip is a processor solutions company which uniquely helps developers to differentiate their products. We are Europe’s leading RISC-V company with a global presence. Billions of chips already use our technology.

In today’s technology market, differentiation is everything. The difference between success and failure. And, in chip design, this difference is quite literally wafer thin. With increasing transistor costs, your developers can no longer rely on semiconductor scaling and legacy processors to achieve your goals. The only way forward is to implement custom compute with designs tailored to your applications.

We deliver custom compute through the combination of the open RISC-V ISA, RISC-V ISA processor design automation and high-quality processor IP. Our innovative approach lets you easily customize and differentiate your designs. You can develop high-performing, and game-changing products that are truly transformational.

Unlike traditional design approaches, our custom compute enables you to take control of your destiny. We allow you to set free your creativity and to use your ingenuity. We’re at the leading edge of a transformation in processor design, providing our partners, the most innovative companies on the planet, with a proven alternative to the norm.

At Codasip, we enable you to design different.

It’s time to take the leap.

Architect your ambition.

See you at DAC!

Also Read:

Webinar – CHERI: Fine-Grained Memory Protection to Prevent Cyber Attacks

An open letter regarding Cyber Resilience of the UK’s Critical National Infrastructure

Webinar: Fine-grained Memory Protection to Prevent RISC-V Cyber Attacks

How Codasip Unleashed CHERI and Created a Paradigm Shift for Secured Innovation

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