Dr. Black has over 30 years of industry experience. Before joining Codasip, he has been President and CEO at Imagination Technologies and previously CEO at Rambus, MobiWire (SAGEM Handsets), UPEK, and Wavecom. He holds a BS and MS in Engineering and a Ph.D. in Materials science from Cornell University. A consistent thread of his career has been processors including PowerPC at IBM, network processors at Freescale, security processors at Rambus, and GPUs at Imagination.
Tell us about Codasip
Codasip is unique. It was founded in 2014, and a year later we were offering the first commercial RISC-V core and co-founding RISC-V International. Since then, we have grown rapidly, particularly in the past two years. Today we have 179 employees in offices around the world in 17 locations. What I find so interesting is that we do ‘RISC-V with a twist’. We design RISC-V cores using Studio, our EDA tool, and then license both the cores and Studio to our customers so they can customize the processors for their unique applications. Think of Codasip as providing a very low-cost architectural license with a fantastic EDA tool to change the design so it is unique for you – ‘design for differentiation’.
Our customers all seem to have one common characteristic – they are ambitious innovators that want to make their products better than what you get from just a standard offering.
‘Codasip makes the promise of RISC-V openness a reality’, can you explain?
The RISC-V instruction set architecture, or ISA, is an open standard specifically designed for customers to be able to extend it to fit their specific need, whilst still having a base design that is common. You can add optional standard extensions and non-standard custom extensions whenever you want to ensure the processor you are designing truly runs your workload optimally.
Some people say that this creates fragmentation, but it really does not. Indeed, alternative proprietary architectures have segment specific versions that one could call fragmented because they are not interoperable. The key question is – do you want the processor supplier to control what you do, or do you want to decide for yourself? I think the answer is obvious. We see the industry moving to letting customers decide, not the supplier.
With our approach you can always use our standard processor offering to start with, and be assured that you can change it in the future if you want to. In fact, we like to think that describing the processor using CodAL source code plus the open RISC-V ISA reinvents the concept of architecture licenses to give customers the best of both worlds – a base design with a proven quality through unparalleled verification, plus an easy way to customize for any application.
You recently announced several partnerships with RISC-V players, can you tell us more about your role in the RISC-V ecosystem?
We strongly believe that to be successful RISC-V requires a community – nobody can or should walk alone. By partnering with other key players in the industry we all build the RISC-V ecosystem together.
Two areas we feel the community needs to focus on and excel at are processor verification and security. So we were proud to partner with Siemens EDA on verification, and CryptoQuantique on security. Each has industry-leading solutions and are great partners.
We also recently joined the Intel Pathfinder for RISC-V program, which is helping the industry scale. We made our award-winning L31 core available for evaluation on Intel’s widely accepted FPGA platform, targeted for both educational and commercial purposes.
Similarly, we were keen to help the ecosystem to increase the quality of RISC-V processor IP by being part of the Open HW Group, which has a strong belief in commercial grade verification.
You also recently announced the acquisition of a cybersecurity company, can you tell us more?
We fundamentally believe in both organic and inorganic growth because we are always looking for the absolutely best talent, and were lucky enough to find the Cerberus team, a UK-based cybersecurity company known for its strong hardware and software IP. The Cerberus team really embraced the Codasip approach and have already been instrumental in helping us to win new business in secure processors and secure processing. To expand the initiative, we are now in the process of combining our automotive safety initiative with our security initiative, which is something that we believe can be incredibly important for the industry. Stay tuned.
As a leading European RISC-V company, how do you influence the European industry and market?
We like to think of ourselves as a global company, engaging customers and partners across the world, but always operating locally and very proud of our European heritage. Europe is home to many great semiconductor and systems companies doing chip design, and has a fantastic STEM (Science, Technology, Engineering, and Mathematics) education system supplying a large number of talented graduates each year. Our university program launched this year is expanding rapidly and we look to be at 24 universities by the end of next year. Given the geopolitical situation today, we believe that it is incredibly important to have a strategy of balancing and being both local and global.
How do you see the future of RISC-V and the future of Codasip?
Definitely extremely bright! RISC-V is growing and getting serious attention for good reasons – customers are looking for open ISA alternatives with ecosystem support, and RISC-V is what they are all turning to. Everyone knows about RISC-V and Codasip is no longer a well-kept secret. The question is no longer if RISC-V is too risky to adopt, but whether it is too risky not to adopt?