An open letter regarding Cyber Resilience of the UK’s Critical National Infrastructure

An open letter regarding Cyber Resilience of the UK’s Critical National Infrastructure
by admin on 05-20-2024 at 10:00 am

Codasip UK Security Letter 1

Codasip announced a commercially available RISC-V processor with CHERI for license in October of 2023 and is demonstrating technology for IP provenance. 

Dear Members of the Science, Innovation and Technology Committee,

Let me start by applauding your hearing on 24 April 2024, and in particular the evidence of Professor John… Read More


NoCs give architects flexibility in system-in RISC-V design

NoCs give architects flexibility in system-in RISC-V design
by Don Dingee on 11-16-2023 at 6:00 am

Power domains and crossings into NoC for system in RISC V design

RISC-V tends to generate excitement over the possibilities for the processor core, any custom instruction extensions, and its attached memory subsystem. Those are all necessary steps to obtaining system-level performance. But is that attention sufficient? Architects who have ventured into larger system-on-chip (SoC) … Read More


Extending RISC-V for accelerating FIR and median filters

Extending RISC-V for accelerating FIR and median filters
by Don Dingee on 09-05-2023 at 10:00 am

Custom hardware blocks for FIR and median filters

RISC-V presents a unique opportunity for designers to extend the microarchitecture with custom instructions. One possible application is digital signal filtering using finite impulse response (FIR) or median filters, potential algorithms for carrier demodulation schemes in communications systems like 5G. Codasip application… Read More


Taking the Risk out of Developing Your Own RISC-V Processor with Fast, Architecture-Driven, PPA Optimization

Taking the Risk out of Developing Your Own RISC-V Processor with Fast, Architecture-Driven, PPA Optimization
by Daniel Nenni on 04-12-2023 at 10:00 am

Updated Speaker Slide

Are you developing or thinking about developing your own RISC-V processor? You’re not alone. The use of the RISC-V ISA to develop processors for SoCs is a growing trend. RISC-V offers a lot of flexibility with the ability to customize or create ISA and microarchitectural extensions to differentiate your design no matter your application… Read More


CEO Interview: Ron Black of Codasip

CEO Interview: Ron Black of Codasip
by Daniel Nenni on 12-16-2022 at 6:00 am

RBl

Dr. Black has over 30 years of industry experience. Before joining Codasip, he has been President and CEO at Imagination Technologies and previously CEO at Rambus, MobiWire (SAGEM Handsets), UPEK, and Wavecom. He holds a BS and MS in Engineering and a Ph.D. in Materials science from Cornell University. A consistent thread of his… Read More