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IP: Make or Buy?

IP: Make or Buy?
by Paul McLellan on 07-30-2013 at 2:02 pm

A couple of weekends ago I moderated a panel session for the Chinese American Semiconductor Professional Association. No, I had no idea such an organization existed either (at least partially because I’m not Chinese). Dan Nenni was meant to be doing it but he went off to Las Vegas, so I ended up getting the job. On a Saturday … Read More


Power and Reliability Sign-off – A must, but how?

Power and Reliability Sign-off – A must, but how?
by Pawan Fangaria on 07-29-2013 at 11:00 am

At the onset of SoCs with multiple functionalities being packed together at the helm of technologies to improve upon performance and area; power, which was earlier neglected, has become critical and needs special attention in designing SoCs. And there comes reliability considerations as well due to multiple electrical and … Read More


Premier Gathering for Semiconductor Professionals!

Premier Gathering for Semiconductor Professionals!
by Daniel Nenni on 07-28-2013 at 6:00 pm

The US Executive Forum hosted by the Global Semiconductor Alliance is coming up on September 25th at the beautiful Rosewood Sand Hill Hotel in Menlo Park. Over 150 executives from the semiconductor and technology industry will attend creating a truly unique opportunity to listen to some of the world’s foremost speakers… Read More


Lynn Conway’s Story

Lynn Conway’s Story
by Paul McLellan on 07-28-2013 at 12:08 am

If you are my age, you know that the most influential book in that era on VLSI design was Carver Mead and Lynn Conway’s textbook, blah VLSI blah. Nobody can remember exactly what its title was, it was just referred to as Mead and Conway. In my opinion it was the most influential book on semiconductor design ever. It opened up VLSI… Read More


What Applications Implement Best with High Level Synthesis?

What Applications Implement Best with High Level Synthesis?
by Daniel Payne on 07-26-2013 at 3:12 pm

RTL coding using languages like Verilog and VHDL have been around since the 1980’s and for almost as long a time we’ve been hearing about High Level Synthesis, or HLS that allows an SoC designer to code above the RTL level where you code at the algorithm level. The most popular HLS languages today are C, C++ and SystemC.… Read More


Epitaxy: Not Just For PMOS Anymore

Epitaxy: Not Just For PMOS Anymore
by Paul McLellan on 07-25-2013 at 2:25 pm

At Semicon I met with Applied Materials to learn about epitaxy. This is when a monocrystalline film is grown on the substrate which takes on a lattice structure that matches the substrate. It forms a high purity starting point for building a transistor and is also the basis of the strain engineering in a modern process.

Since holes… Read More


System Reliability Audits

System Reliability Audits
by Paul McLellan on 07-25-2013 at 12:09 pm

How reliable is your cell-phone? Actually, you don’t really care. It will crash from time to time due to software bugs and you’ll throw it away after two or three years. If a few phones also crash due to stray neutrons from outer space or stray alpha particles from the solder balls used in the flip-chip bonding then nobody… Read More


From Layout Sign-off to RTL Sign-off

From Layout Sign-off to RTL Sign-off
by Pawan Fangaria on 07-25-2013 at 5:00 am

This week, I had a nice opportunity meeting Charu Puri, Corporate Marketing and Sushil Gupta, V.P. & Managing Director at Atrenta, Noida. Well, I know Sushil since 1990s; in fact, he was my manager at one point of time during my job earlier than Cadence. He leads this large R&D development centre, consisting about 200 people… Read More