A Six-Minute Journey to Secure Chip Design with CaspiaHardware-level chip security has become an important topic…Read More
Lessons from the DeepChip Wars: What a Decade-old Debate Teaches Us About Tech EvolutionThe competitive landscape of hardware-assisted verification (HAV) has…Read More
Think Quantum Computing is Hype? Mastercard Begs to DisagreeJust got an opportunity to write a blog…Read More
TSMC Kumamoto: Pioneering Japan's Semiconductor RevivalIn the lush landscapes of Kumamoto Prefecture, on…Read More
You are visiting San Francisco and you have dutifully read your guide book. Let me give you some contrarian advice.
See the Golden Gate Bridge. The best way is not to drive there or get a taxi, but to rent a bicycle (lots of places on that side of the city, try Googling “blazing saddles”) and cycle across the bridge. You can then go down … Read More
Gary Smith once again wore his signature white coat and extolled the virtues of system level design and automation. The room at the Intercontinental was packed, and the folks in the hallway outside were noisy as usual, eager for the party to start after Gary finished.… Read More
Every year, Mary Meeker produces a huge presentation (140 slides) on important trends in the internet. This year’s came out at the end of last week. It is well worth the time it takes to go through it. Here is the first slide, effectively the table of contents:
Mind you, this post is being written by the same guy who wrote8 Reasons Why I Hate My iPhone 5. I’ve been living with the Samsung S4 for about a year, and am ready to return to the Apple fold. It’s partially that too many, or perhaps the wrong apps running on my phone cause big problems. This manifests itself anywhere from … Read More
Recently, I mentioned smartphone SoCs consume one, maybe two orders of magnitude too much power for broader use in wearables. However, that is only when they are “on”. To save power and stretch battery life, smartphones spend a lot of time napping – display off, sitting still with MEMS sensors powered down, waiting for an incoming… Read More
eSilicon will be providing books for the first 300 people to attend the Tuesday night networking reception sponsored by SemiWiki. To avoid confusion they will be giving out BOOK COUPONS when you arrive to be redeemed when the event starts so grab a coupon, enjoy the food and drinks! I can assure you this will be the ultimate networking… Read More
Design starts are the lifeblood of the semiconductor industry. It’s not just the design start itself, it’s the innovation that goes with it. As the semiconductor industry consolidates and the cost of modern semiconductor design increases you have to ask yourself: Where are the next generation of design starts going to come from?… Read More
My former co-worker, Kenneth Bakalar at Mentor Graphics is an expert in AMS modeling languages and UPFmethodology, so he recently teamed up with Eric Jeandeau to author an interesting white paper: Interpreting UPF for a Mixed-Signal Design Under Test. This white paper is based on a presentation made at DVCon earlier this year.… Read More
You are going to DAC next week. And you don’t want to eat a Moscone Center rubber chicken Caesar salad for lunch. But you lack local knowledge. So here are some places within a 10 minute walk (these are just places I like. Nobody is paying me to recommend them).
The food court in the San Francisco Center on Market Street between … Read More
DAC starts on Sunday. If you are in San Francisco on Sunday then the first event is the normal welcome reception. This is the ultimate networking event in EDA. It is in the Intercontinental Hotel about a block from the convention center and runs from 5.30 to 7pm. This is preceded by Gary Smith’s traditional kickoff from 5pm to… Read More
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AI RTL Generation versus AI RTL Verification