The automotive industry has reached a new era marked by giant initiatives like infotainment, connected car and semi-autonomous vehicles. And no one seems more excited than the MCU guys who have been a part and parcel of in-car electronics for the past two decades. However, the humble microcontroller is going through a profound… Read More
Security Coverage: Assuring Comprehensive Security in Hardware DesignAs hardware systems become increasingly complex and security…Read More
Scaling 3D IC Technologies – Siemens Hosts a Meeting of the Minds at DAC3D IC was a very popular topic at…Read More
Analysis and Exploration of Parasitic EffectsWith advanced semiconductor processes continuing to shrink, the…Read More
Siemens Proposes Unified Static and Formal Verification with AIGiven my SpyGlass background I always keep an…Read More
Alchip Launches 2nm Design Platform for HPC and AI ASICs, Eyes TSMC N2 and A16 RoadmapAlchip Technologies, a global leader in high-performance computing…Read More
EUV Makes Progress and Other Observations From SPIE
The SPIE Advanced Lithography Conference is the world’s premier conference for patterning techniques utilized to manufacture semiconductors. At any given time during the conference there are multiple parallel sessions so it is impossible to see all of the papers presented. Prior to the conference I reviewed and blogged on … Read More
Got FPGA Timing Closure Problems?
I had a meeting with Harn Hua Ng, the CEO of Plunify, a couple of weeks ago. They are an EDA company that I’d never heard of. Partially that is because they only play in the FPGA space, a country I visit less frequently than SoC land. Plus, they are based in Singapore, a country I have only been to a couple of times in my life.
Plunify… Read More
Arteris Sees Consolidation Amid ADAS Gold Rush
The sensor fusion in vehicles is leading to a new era of information sharing from almost all components of a car, including chassis, suspension and rapidly taking off Advanced Driver Assistance Systems (ADAS). According to network-on-chip (NoC) interconnect IP solution provider Arteris Inc., as more cameras and sensors are… Read More
Who Leads Semiconductor Innovation?
Semiconductor business is highly dependent on technology and that changes very rapidly in the semiconductor space. It’s important to recognize the importance of research and innovation activities in this space. In my last article on 7nm technology node, one respondent commented, very rightly, “It’s important to have competition… Read More
Vietnam: Rising Star in Electronics
I recently returned from a trip to Southeast Asia, including Vietnam. The trip was for pleasure, not business, but I could not help but notice the boom in economic activity. The coastal cities of Hai Phong, Da Nang and NHA Trang were trying to outdo each other in building hotels, bridges and amusement parks – largely to cater to foreign… Read More
A Brief History of CLKDA: Every Picosecond Counts Below 28nm
One thing to point out is that the CLK of CLKDA are the initials of the founders, they are not focused on clocks! I’m sure you can guess what DA stands for, although it is also the last two letters of the fourth founder’s name.
They have been in existence since 2005, backed by Atlas Ventures and Morgenthaler. They are headquartered… Read More
Samsung 14nm IS in Production!
There is quite a debate raging on whether Samsung Foundry is truly in production at 14nm. The word amongst the fabless semiconductor ecosystem is yes and this comes from two very large fabless companies that are reportedly using Samsung for 14nm and have even started looking at Samsung 10nm. Of course you can Google for stories by… Read More
ASML ASyMptotic progress- When will we get to EUV?
- ASML making progress – but is it fast enough?
- ASML has missed 10nm , can it catch 7nm? An economic question
- Day one at SPIE- Better tone than last year but still cautious
1000 simulated wafers versus 700 simulated
At the opening of the SPIE conference ASML announced that TSMC had reached 1000 wafers a day “exposed”… Read More
High Level Synthesis Gets Stronger
High Level Synthesis (HLS) tools have been around for at least two decades now, and you may recall that about one year ago Cadence acquired Forte. The whole promise of HLS is to provide more design and verification productivity by raising the design abstraction from RTL code up to SystemC, C or C++ code. With any acquisition it is natural… Read More
cHBM for AI: Capabilities, Challenges, and Opportunities