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Beyond Traditional OOO: A Time-Based, Slice-Based Approach to High-Performance RISC-V CPUs

Beyond Traditional OOO: A Time-Based, Slice-Based Approach to High-Performance RISC-V CPUs
by Kalar Rajendiran on 09-01-2025 at 10:00 am

Hot Chips Logo 2025

For decades, high-performance CPU design has been dominated by traditional out-of-order (OOO) execution architectures. Giants like Intel, Arm, and AMD have refined this approach into an industry standard—balancing performance and complexity through increasingly sophisticated schedulers, speculation, and runtime … Read More


Orchestrating IC verification: Harmonize complexity for faster time-to-market

Orchestrating IC verification: Harmonize complexity for faster time-to-market
by Admin on 09-01-2025 at 6:00 am

fig1 optimize ic with mjs

By Marko Suominen and Slava Zhuchenya of Siemens Digital Industries Software.

It’s often said that an orchestra without a conductor is just a collection of talented individuals making noise. The conductor’s role is to transform that potential cacophony into a unified, beautiful symphony. The same concept holds… Read More


Basilisk at Hot Chips 2025 Presented Ominous Challenge to IP/EDA Status Quo

Basilisk at Hot Chips 2025 Presented Ominous Challenge to IP/EDA Status Quo
by Jonah McLeod on 08-31-2025 at 10:00 am

Hot Chips Logo 2025

At Hot Chips 2025, Philippe Sauter of ETH Zürich presented Basilisk, a project that may redefine what’s possible with open-source hardware. Basilisk is a 34 mm² RISC-V SoC fabricated at IHP Microelectronics on its open-source 130nm BiCMOS process in Germany. Basilisk, named after the Greco-Roman mythical creature known… Read More


CEO Interview with Nir Minerbi of Classiq

CEO Interview with Nir Minerbi of Classiq
by Daniel Nenni on 08-31-2025 at 8:00 am

Nir


Nir Minerbi is a co-founder and the CEO of Classiq. Nir is highly experienced in leading groundbreaking, multi-national technological projects, from idea to deployment. Nir is a Talpiot alumnus and a master’s graduate in physics as well as electrical and electronics engineering (M.Sc.).

Tell us about Classiq.

Classiq… Read More


Podcast EP305: On Overview of imec’s XTCO Program with Dr. Julien Ryckaert

Podcast EP305: On Overview of imec’s XTCO Program with Dr. Julien Ryckaert
by Daniel Nenni on 08-29-2025 at 10:00 am

Dan is joined by Dr. Julien Ryckaert who joined imec as a mixed-signal designer in 2000, specializing in RF transceivers, ultra-low power circuit techniques, and analog-to-digital converters. In 2010, he joined imec’s process technology division in charge of design enablement for 3DIC technology. Since 2013, he oversees… Read More


GlobalFoundries 2025 Update GTS25

GlobalFoundries 2025 Update GTS25
by Daniel Nenni on 08-29-2025 at 6:00 am

GTS25 GlobalFoundries Technical Summit 2025

“GTS25 brings together leaders from across the semiconductor industry ​to share their insights on the latest technology trends that enable GF to design the essential chips the world relies on to live, work and connect.​”

GlobalFoundries (GF), a leading contract semiconductor manufacturer, plays an important… Read More


Perforce and Siemens at #62DAC

Perforce and Siemens at #62DAC
by Daniel Payne on 08-28-2025 at 10:00 am

perforce siemens min

Wednesday was the last day at #62DAC for me and I attended an Exhibitor Session entitled, Engineering the Semiconductor Digital Thread, which featured Vishal Moondhra, VP Solutions Engineering of Perforce IPLM and Michael Munsey, VP Semiconductor Industry at Siemens Digital Industries. Instead of just talking from slides,… Read More


Synopsys Enables AI Advances with UALink

Synopsys Enables AI Advances with UALink
by Mike Gianfagna on 08-28-2025 at 6:00 am

Synopsys Enables AI Advances with UALink

The evolution of hyperscale data center infrastructure to support the processing of trillions of parameters for large language models has created some rather substantial design challenges. These massive processing facilities must scale to hundreds of thousands of accelerators with highly efficient and fast connections.… Read More


Revolutionizing Chip Packaging: The Impact of Intel’s Embedded Multi-Die Interconnect Bridge (EMIB)

Revolutionizing Chip Packaging: The Impact of Intel’s Embedded Multi-Die Interconnect Bridge (EMIB)
by Admin on 08-27-2025 at 10:00 am

Intel Foundry Packaging Evolution 2025

In an era dominated by artificial intelligence (AI), machine learning (ML), and high-performance computing (HPC), the demand for semiconductors that deliver high data throughput, low latency, and energy efficiency has never been greater. Traditional chip designs often struggle to keep pace with these requirements, leading… Read More


Cocotb for Verification. Innovation in Verification

Cocotb for Verification. Innovation in Verification
by Bernard Murphy on 08-27-2025 at 6:00 am

Innovation New

This time let’s see if we can stir up some lively debate. Cocotb isn’t new but it is an interesting alternative to mainstream testing methodologies. Paul Cunningham (GM, Verification at Cadence), Raúl Camposano (Silicon Catalyst, entrepreneur, former Synopsys CTO and lecturer at Stanford, EE292A) and I continue our series … Read More