EDA industry pundit Gary Smithhas been talking about the electronics industry adopting an ESL tool flow for decades, so it was my pleasure to speak with Bill Neifertof Carbon Design Systemsat DAC this month because his company has been offering both tools and models that enable a virtual prototyping design flow.… Read More
The Intel Resurgence?
There is an interesting article on Seeking Alpha about Intel. Interesting because it is written by someone with both fabless semiconductor experience and a talent for strategic thinking. It’s a good read and like most Seeking Aplha semiconductor articles the comments are hilarious. Give the guy a penny and click over HERE, he … Read More
What can you do when your fab closes down?
A recent report from IC Insights described 72 wafer fabs that have closed in the past five years. Eight more plants have gone in 2014, showing the trend is continuing.
This leaves their customers with a problem: what can they do when the fab shuts down? Some may recognise that their own technology has reached the end of its life and work… Read More
This is How We Get One Million Design Starts!
One of the most interesting demos at #51DAC was the eSilicon GDS II online quote system for TSMC. Probably because eSilicon was one of the most interesting companies exhibiting this year. While writing the book “Fabless: The Transformation of the Semiconductor Industry” we took a close look at the history of fabless semiconductor… Read More
High Level Synthesis update from #51DAC
Every since Synopsys dominated the logic synthesis market in the 1980’s we’ve had something called HLS – High Level Synthesis, meaning something higher than what Design Compiler can understand as input. At DACthis year I met with Mark Milligan of Calypto to get an update on what’s new with HLS. I first… Read More
I’ll be with you in a second
One aspect of always-on is power conservation, being able to respond to events without having a device constantly in full-power mode. This month, the announcement of the Amazon Fire Phone and details revealed about the Google Android Wear SDK suggest another important dimension: the competitive advantage of rapid, frictionless… Read More
Standard Cell, IO and Hard IP Validation update
Every SoC team uses libraries of cells to get their new product to market quicker: Standard Cells, IO Cells and Hard IP blocks. One immediate question that comes to my mind is, “How clean are these cells?” Validating your cell libraries first makes sense, and will ensure that there are fewer surprises as your chip gets… Read More
Electronics growth positive around the world
Electronics production growth has turned positive in 2014 for all key geographic regions. The graph below shows three-month-average change versus a year ago for electronics production in local currency through April 2014. Total industrial production is used for Europe (EU countries) and South Korea since electronic production… Read More
IP Management Update at DAC
To keep track of my business and personal finances I use software from Quicken, but for an SoC with hundreds of IP blocks how do you keep track of everything? The answer is found in the growing field of EDA tools for IP management, and at DACearlier this month I sat down with Neil Handof Methodics to get an update on what the industry trends… Read More
What’s New with Circuit Simulation for Cadence?
Every year at DAC I enjoy making the rounds to see what’s new with SPICE circuit simulators, so on June 3rd I met with Xiuya Liand Dan Zhuof Cadence in San Francisco to get an update about their Spectre tool. There’s plenty of competition in the SPICE area from Mentor Graphics (Analog FastSPICE, Eldo, ADiT), Synopsys … Read More
Real men have fabs!