I would like to further discuss this graphic (presented during IP-SoC 2014 by John Koeter, VP of Marketing IP and prototyping, Synopsys) and focus on Active Design and Tapeouts at 28nm. In fact the very first activity appeared in Q1 2007, but it was only during 2010 that 28nm become popular, after the first Tapeouts coming in Q1 and… Read More
Can Android1 Lead the Way for Google in New Smartphone Market?
I had been wanting to write about it since Google’sbig bang announcement of Android1 in India in Sep this year and their associated strategy to capture some of the large pockets of Smartphone market within a matured or declining cell phone market and maturing overall market of Smartphone. Since I wrote my last article hereon maturation… Read More
IP-SoC 2014 Top Class Presentations…
… were given to an ever shrinking audience. This is IP-SoC paradox: audience has enjoyed very good presentations made by Cadence, Synopsys or ST-Microelectronic, to name just a few. As far as I am concerned, I was happy to present the “Interface IP Winners and Losers (Protocols)” in the amphitheater during the first day, enjoying… Read More
Xilinx Creates Worlds Fastest, Densest, DSP Rich FPGA and Shipping Now
Xilinx, last week announced that it has shipped the 20nm Kintex-115 Device, and I quote:
“Xilinx has produced a 20nm FPGA for data center acceleration called Kintex UltraScaleKU115 FPGA.
The chips deliver up to:
· 1.16M logic cells,
· 5,520 optimized DSP slices,
· 76 Mbits of block RAM,
· 16.3Gbps backplane-capable transceivers,… Read More
Who is REALLY Using TSMC 16FF+?
As I wrote last week there is a whole list of companies on LinkedIn with people working on TSMC 16nm. Today TSMC released a list of customers that have risk production 16FF+ silicon. Most of us knew this already but now we can talk about it in more detail. This is a really big deal for the FinFET doubters out there. Just because Intel had… Read More
HP’s Multi Jet Fusion 3D Printer — Rapid Prototyping to Mass Manufacturing
On October 29[SUP]th[/SUP] HP announced their long-anticipated entry into the 3D printing market with the HP Multi Jet Fusion. The HP Multi Jet Fusion is an industrial 3D printer that is anticipated to be 10 times faster and 50% less than current systems. The system will be beta tested by customers in 2015 and in production in 2016.… Read More
Using Cadence PVS for Signoff at TowerJazz
TowerJazzis a specialty foundry that provides IC manufacturing into several markets, like: RF, high-performance analog, power, imaging, consumer, automotive, medical, industrial and aerospace/defense. In June there was a presentation from Ofer Tamir of TowerJazz at DACin the Cadence theatre, so I had a chance this week … Read More
How Sonics Uses Jasper Formal Verification
The Jasper part of Cadence announced jointly with Sonics a relationship whereby Sonics uses JasperGold Apps as part of their verification. I talked to Drew Wingard, the CTO, about how they use it.
One way is during the day when their design engineers use Jasper as part of their verification arsenal. Interestingly it is the design… Read More
What is up with CEVA?!?!?!
Semiconductor IP is definitely driving the rapid mobile expansion we are experiencing today and CEVA is a glaring example of that. Mobile design cycles are a fraction of what they used to be so who has time to create, integrate, AND validate your own IP blocks, especially at multiple foundries?
Just a little background, CEVA is really… Read More
Power-Aware Verification in Mixed-Signal Simulation
My Samsung Galaxy Note 2 phone lasts about 1.5 days on a single battery charge, thanks in part to the clever power conservation approaches like when the screen is automatically dimmed then turned off after no activity. Mobile phones and many other battery-powered devices used today all need power-saving designs, which then means… Read More
ASML- Soft revenues & Orders – But…China 49% – Memory Improving