The world of IoT security just became more complex. IoT devices are no longer a potential threat to their owners, now they pose a significant threat to everything connected to the Internet.… Read More
Arm targets the agentic AI era with new edge, cloud and robotics platformsArm is expanding its computing platform for an…Read More
Rethinking AI Chips: How VSORA Redesigned the Hardware That Runs AIInstead of tweaking existing designs, VSORA built an…Read More
UWB Without the Integration Headache: Ceva and LG Bring Precision to More ChipsCeva and LG Electronics have joined forces to…Read More
PCIe 7 Switch IP with Time Division Multiplexing: Powering the Next Generation of AI ConnectivityBy Tim Messegee, Senior Director of Solutions Marketing…Read More
Semiconductor Engineering Has a State-Continuity ProblemProduct realization depends not only on reaching the…Read More
The IP Paradox: Sales are growing despite Semi Consolidation
IPnest is launching the “Interface IP Survey” since 2009, and we did it last September again. To build the survey as accurately as possible, I have followed the “divide and conquer” strategy. Interface protocols are varied, ranging from PCI Express, USB, or Ethernet, to memory controller (DDR3, DDR4, LPDDR3, LPDDR4 and more) … Read More
Can one flow bring four domains together?
IoT edge device design means four domains – MEMS, analog, digital, and RF – not only work together, but often live on the same die (or substrate in a 2.5D process) and are optimized for power and size. Getting these domains to work together effective calls for an enhanced flow.
Historically, these domains have not played together … Read More
Is That PDK Safe to Use Yet?
In our semiconductor ecosystem we have foundries on one side supplying all of that amazing silicon technology, and IC designers on the other side that take their system ideas then go implement them in a SoC using a specific foundry. The required interface between foundry and chip designers has been the Process Design Kit (PDK), … Read More
Mentor Webinar Series: Integrating the Systems Engineering Flow
Product lifecycle management is probably not the most gripping topic for most design engineers. You want to get on with architecture, design, verification and implementation. But if you are building products for any safety-sensitive application in a car, a medical appliance, avionics, railway applications in Europe – to name… Read More
Between Waze and a Thin Hard Place
Car makers, semiconductor companies and wireless carriers are all excited these days about creating cars that can drive themselves. Billions of dollars are being spent on acquisitions and investments in companies and technologies that can make this happen. But there is a fly in the ointment by the name of Waze.
To create cars capable… Read More
Manufacturing Singularity is Comng!
One of the many benefits of blogging is that you get to meet some very interesting people. This time I had the pleasure of speaking with Michael Ford of Mentor Graphics about Industry 4.0 and smart factories. In fact, Mentor has an excellent series of white papers titled “Is This a Manufacturing Revolution?” from their Valor Division,… Read More
The Ising on the Cake
Just when you thought you knew all the possible foundations for computing, along comes another one. Forget von Neumann, this approach models Ising machines, systems built on solving a statistical ensemble model of ferromagnetism. The concept is quite simple. Imagine a lattice of magnetic dipoles/spins, each of which can only… Read More
Automation for managed system-of-systems design
Anybody who has done any bus & board system design knows the problem. Merchant boards typically have standardized pinouts (after years of haggling in standards organizations) for the backplane bus, and a group of user-defined pins for daughtercard I/O. Homegrown systems usually have a just-as-carefully defined proprietary… Read More
DFT Approaches for Giga-gate SoC Designs
In the early days of IC design there were arguments against using any extra transistors or gates for testability purposes, because that would be adding extra silicon area which in turn would drive up the costs of the chip and product. Today we are older and wiser, realizing that there are product pricing benefits to quickly test each… Read More
ASML Has High-NA and Chipmakers Can’t Say No