PowerArtist RTL Power Estimation Folds into Keysight

Back in the late 1990s, Sente launched a product called WattWatcher to estimate power from design RTL and simulation activity. This was revolutionary for its time since alternatives, while very accurate, only offered power analysis at the gate level. Gate-level analysis is great for fine-tuning power but is unhelpful for achieving the larger gains possible through architectural optimizations. These improvements can only be explored effectively at RTL (or earlier), which has driven the industry-wide shift toward shift-left design optimization.

Over time, this capability evolved through multiple transitions—Sente to Apache Design Solutions, then to Ansys, and most recently into Synopsys, eventually leading to a spinout into Keysight. This evolution reflects a broader industry realization: power must be addressed early, not late. Modern SoC complexity demands tools that provide actionable insight at RTL. Here I’ll focus on recent successes for PowerArtist, based on a recent webinar.

This is where PowerArtist is positioned today. Rather than being just another power analysis tool, it enables designers to make architecture-level decisions early, when the impact on power, performance, and area is the highest. By combining fast analysis with workload-aware accuracy, PowerArtist brings implementation-relevant insights into the earliest stages of design, helping teams avoid costly late-stage iterations.

Power case studies against realistic workloads

Power remains a challenging metric to manage during design. It is influenced not only by implementation details but also by real-world use cases. A design may meet typical power targets, yet unexpected workloads can cause spikes that lead to system failures.

To address this, PowerArtist emphasizes workload-driven power analysis, bridging the gap between architectural intent and real usage conditions.

For example, joint work with Intel demonstrated emulation-driven power tracking on a GPU using real workloads. They were able to save 3% in dynamic power by improving clock-gating efficiency and 1.5% overall power. While these numbers may appear modest, they are highly significant for already optimized designs—highlighting the value of early visibility.

At earlier stages of design, the impact is even larger. An AMD presentation found 27% saving in dynamic power and 56% improvement in clock gating efficiency for an IP. This reinforces a key message: the earlier you start doing these analyses, the bigger the gains you will find.

A more specialized example was reported by NVIDIA, focusing on RAM access efficiency for a GPU. Such accesses can consume 10–20% of total power. By optimizing unnecessary reads, they reduced dynamic power between 6% and 20% and achieved a net power reduction of 3.5% to 4%.

Estimating glitch power

Glitches can happen when delays are imbalanced in convergent logic, where a gate output can temporarily toggle before stabilizing. These glitches can contribute significantly to dynamic power consumption—up to 40% in some cases.

Traditionally, detecting these imbalances has been a gate-level problem. But that limitation is unacceptable given the power impact. Glitch-aware sensitivity must shift left.

PowerArtist addresses this gap by enabling glitch-aware analysis at RTL. Using fast synthesis and delay modeling, designers can identify glitch risks without lengthy implementation cycles. This allows teams to detect hidden inefficiencies early, avoid costly late-stage fixes, and improve overall design quality.

Bottom Line:

The broader takeaway is clear: power optimization is no longer a back-end problem. The industry is moving toward a methodology where power is analyzed with real workloads, optimization happens at RTL, and complex effects like glitches are addressed early.

PowerArtist aligns strongly with this shift. By combining shift-left analysis, workload awareness, and advanced capabilities like glitch estimation, it acts not just as a power analysis tool, but as a design optimization platform.

As designs become more power-constrained and performance-driven, this shift is essential. PowerArtist enables that transformation, helping teams achieve better power outcomes while accelerating design convergence.

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