Keysight Design Engineering Software at DAC 2026: Going Deep on Chiplets, RF and AI-Driven Design

Keysight Technologies returns to 2026 DAC, The Chips to Systems Conference this year as a Silver Sponsor and an “I LOVE DAC” sponsor, bringing its Design Engineering Software portfolio to Booth #927 at DAC 2026, which runs July 26-29 in Long Beach, Calif. The Keysight team will be on-site Monday through Wednesday (July 27-29) for live demos and one-on-one meetings, which attendees can book in advance through Keysight’s DAC event page.

Keysight Design Engineering Software goes deep into the application-specific workflows where multi-physics interactions across RF and mixed-signal electronics, structural mechanics, thermal and optics decide complex system performance during manufacturing, assembly and real-world operations.

Keysight’s DAC program addresses some of the thorniest problems in chip and system design today.

Accelerating Agentic Design Workflows with Surrogate Modeling

• RF and microwave teams get a look at surrogate modeling, digital twins and closed-loop validation in the session “AI at the RF Frontier: De-Risk and Accelerate Next-Gen Custom RF/MW Design,” presented by Director of Global Software Solutions Ian Rippke.
• AI-enabled power amplifier behavioral modeling built on SystemVue and ADS will be presented in an Engineering Track poster.

Managing and Curating Data for EDA AI workflows

• Simon Rance, General Manager, Engineering Data Management will participate in a panel “Build vs Buy: Who Owns the Intelligence Behind Tomorrow’s Chips?“

Die-to-Die Signal Integrity for Advanced Packaging

• Advanced packaging engineers can explore chiplet, 3DIC and 3D-HI interconnect challenges, including a poster on mixed-domain modeling for hatched ground planes in die-to-die interconnects, validated on silicon bridge and mobile PCB test vehicles.

Pioneering Quantum Design

• Quantum computing gets its own spotlight in the “From Bit to Qubit: EDA Meets Quantum,” panel Chris Mueth, Senior Director, New Markets and Strategic Initiatives, which examines how quantum EDA platforms and digital twins intersect with chip design workflows.

Detecting Glitch power in RTL code

• Two posters tackle RTL-level glitch power, showing how early detection and delay-aware analysis can cut dynamic power 10-30% before layout ever begins.
  • Maximize RoI Through Glitch Power Optimization at Early Design Stage
  • Hunting RTL Glitches Before They Burn Power: A Practical RTL Success Story
• A third poster introduces a machine-learning-driven flow for automatic compact model extraction, aimed at replacing manual, expert-tuned processes with scalable, repeatable optimization.

At the booth (#927), Keysight Design Engineering Software will demo its engineering data management tools, including SOS Enterprise for governed, AI-ready engineering data at scale and RF Circuit Simulation Professional, featuring an executable RF design workflow tool that lets engineers build and document simulation workflows visually or in Python.

The sessions and demos target chip, package and RF/microwave design engineers, quantum hardware teams and EDA and engineering leadership evaluating how AI and governed data fit into their workflows.

Registration for DAC 2026 is free through the “I LOVE DAC” program, and meetings with the Keysight team at Booth #927 can be scheduled for Monday – Wednesday July 27-29 by visiting Keysight’s DAC event page.

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