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Design and Optimization of Analog IP is Possible

Design and Optimization of Analog IP is Possible
by Daniel Payne on 12-04-2015 at 7:00 am

Designing Analog IP is often referred to as a “black art”, something that only highly experienced craftsmen can produce using transistor-level techniques that aren’t shared outside of their closely held group of trusted co-workers. I’d like to suggest that Analog IP can be designed and optimized … Read More


Auto ISAC—What is it and do we need one?

Auto ISAC—What is it and do we need one?
by Chan Lieu on 12-03-2015 at 12:00 pm

An Information Sharing and Analysis Center (ISAC) is essentially a trusted entity established by critical infrastructure owners and operators to share threat data. ISACs first emerged in 1998 when President Clinton issued Presidential Decision Directive 63, which identified the nation’s critical infrastructure that could… Read More


Magwel’s Current Tools Take an Active Role in Power Transistor Design

Magwel’s Current Tools Take an Active Role in Power Transistor Design
by Tom Simon on 12-03-2015 at 7:00 am

It often seems that semiconductor industry coverage focuses on large digital markets like microprocessors or high frequency analog designs for RF applications. Yes, these are large markets, but power transistors like IBGT and VFETS make up a large and crucial sector. Not only do they make their way into discretes, but they are… Read More


mbed Evaluation Boards Showcase Focus on IoT Software, Connectivity

mbed Evaluation Boards Showcase Focus on IoT Software, Connectivity
by Majeed Ahmad on 12-02-2015 at 4:00 pm

ARM’s mbed operating system is winning attention in the highly fragmented embedded software space by promising a solid software foundation for interoperable hardware and thus scale the Internet of Things (IoT) designs by narrowing the development time.… Read More


Academia and TCAD Grow Closer

Academia and TCAD Grow Closer
by Daniel Payne on 12-02-2015 at 12:00 pm

On my first trip to Austria for EDA business I traveled by car from Germany, and I couldn’t wait to see how fast we would travel on the fabled Autobahn. Oddly enough it was summertime and the Autobahn was filled with vacationing families driving cars with shiny, aluminum campers in tow, so our car only traveled about 60 mph, nothing… Read More


Advances in DDR IP Solution for High-Performance SoCs

Advances in DDR IP Solution for High-Performance SoCs
by Pawan Fangaria on 12-02-2015 at 7:00 am

In this era of high-performance, low-power, and low-cost devices coming up at an unprecedented scale, the SoCs can never attain the ultimate in performance; always there is scope for improvement. Several methods including innovative technology, multi-processor architecture, memory, data traffic management for low latency,… Read More


Samsung Versus Intel at 14nm

Samsung Versus Intel at 14nm
by Scotten Jones on 12-01-2015 at 6:00 pm

Daniel Nenni recently blogged about Intel’s claims of industry leading process density that were made at their analysts meeting. It isn’t clear to me why Intel makes this such a big focus at the analysts meetings, they really don’t compete with the foundries much but this seems to be a big deal to them. I thought it would be interesting… Read More


5 ways FPGA-based prototyping shrinks design time

5 ways FPGA-based prototyping shrinks design time
by Don Dingee on 12-01-2015 at 7:00 am

Engineers are trained to think linearly, along the lines of we started here, then we did this, and that, and this other stuff, and here is where we ended up. If you’ve ever presented in an internal review meeting, sales conference, or a TED-like event, you know that is a dangerous strategy in winning friends and influencing people.… Read More