Both IBM and Huawei say three-dimensional designs could improve chip performance, but IBM may have gone one better.
A month ago, Huawei's executives were feeling very pleased with themselves about a purported breakthrough in chip design that would allow the Chinese vendor to wriggle out of the constraints imposed by US sanctions. They were so pleased, in fact, that they issued a rare announcement to international media and analysts while the Americans were off for Memorial Day. IBM may just have spoiled the party by appearing to go one better.
For years, semiconductor companies have made chips more powerful by cramming bigger volumes of transistors into an area of the same size. Dubbed Moore's Law, after Intel founder Gordon Moore, it was more observation than rigorous scientific principle, and the industry had seemed to be approaching a limit.
By its own recent admission, Huawei had arrived at a barrier much sooner after being cut off from the world's most advanced chipmaking equipment. In the world of silicon, the smaller the measurement in nanometers (billionths of a meter), the more advanced the chip. Taiwan's TSMC, the world's most advanced semiconductor foundry, today churns out 3-nanometer chips for customers including Ericsson, Huawei's main rival in 5G networks. Huawei and its Chinese partners appear stuck on 7 nanometers, about two generations behind.
Traditionally, the components of a chip were laid out next to one another like rows of single-story homes. Huawei's apparent solution was to make the whole semiconductor more three-dimensional, stacking components like the floors of a Shanghai skyscraper, or the chips found in casinos. Doing this, the vendor claimed, could shorten the distances between the components and improve the performance of the chip. As fans of science-fiction movies will appreciate, traveling from one point of the universe to another would be much quicker if space could be wrapped or bent back on itself.
But this was not science fiction, according to Huawei, which was sufficiently proud of its innovation to call it the Tau Scaling Law – or Her's Law, after the Huawei executive mainly responsible – in a cheeky dig at Intel. Her's Law wouldn't necessarily allow Huawei to produce the 3-nanometer chips used in iPhones and entering network products made by Ericsson, according to a company representative. But it might allow Huawei to achieve an equivalent performance and remain competitive.
Going atomic
Yet the notion of making chips more three-dimensional did not sound as strikingly original as Huawei seemed to believe. And the update from IBM this week suggests Huawei might not be able to claw back much, if any, competitiveness through Her's Law. Much like the Chinese company, IBM has claimed a "semiconductor breakthrough" with a design that stacks transistors to make chips look more three-dimensional. What it calls its "nanostack" architecture is, the company boasts, a "landmark moment for an industry facing the physical limits of traditional chip scaling."Whatever the specific technical differences are between Her's Law and the nanostack, the basic concepts advanced by Huawei and IBM sound remarkably alike to a layperson. And unlike Huawei, IBM presents its technology as a means of cramming in even bigger volumes of transistors. "The nanostack design vertically stacks and staggers transistors, taking advantage of 3D sequential integration to pack more transistors onto a chip," said IBM in its statement.
It is, accordingly, advertising what it says is the world's first sub-nanometer chip, measuring as little as 0.7 nanometers or 7 angstroms, a word that may be unfamiliar to many readers but one that could eventually supersede nanometers in conversations about chip measurements. The dimensions, stunningly, are now approaching the size of individual atoms, says IBM. Chips are entering the territory of Marvel superhero Ant-Man.
Even so, just as Huawei made no reference to nanometers when it presented Her's Law, IBM did not say anywhere that bringing components closer together would itself improve performance. For all the talk of three-dimensional designs eclipsing two-dimensional ones, there may be some fundamental differences in the approaches the companies have taken. But IBM has not, of course, been the target of crippling sanctions. It might simply have underplayed other gains, preferring to highlight those widely recognized physical measurements.
Neither Her's Law nor the nanostack look close to entering commercial production, and they may be years off, if they happen at all. The big problem for Huawei remains its inability to source chips from advanced foundries outside China. Going below 7 nanometers seems to require the use of extreme ultraviolet lithography (EUV), a chipmaking technology still monopolized by ASML of the Netherlands. It is used by Intel, Samsung and, of course, TSMC, but the Dutch government has prohibited EUV sales to China.
For Huawei, obtaining even 7-nanometer chips has apparently been difficult. Ideally, these would also be made with EUV technology, according to chip experts. Industry sources reckon the Chinese company relied on deep ultra-violet lithography (DUV), an older generation, in tandem with a technique called multiple patterning, which effectively repeats the lithography process. While ASML is forbidden from selling EUV machines to China, it has previously sold DUV equipment to Semiconductor Manufacturing International Corporation, China's biggest foundry. The drawback of multiple patterning is that it typically results in lower yields, the percentage of usable chips.
Her's Law generated plenty of interest outside China when it was unveiled in late May. But there was also skepticism about Huawei's claims. By 2031, the vendor reckons it will be able to produce chips with the capability of 1.4-nanometer designs. The question is where foundries now gearing up for 2-nanometer production will be in five years' time. IBM seems to think the answer is atomic.