Siemens Mentor recently announced PAVE360™, a very cool comprehensive pre silicon simulation environment. Autonomous cars are very popular here in Silicon Valley and quite safe on the highways since the average speed is 25mph (horrible traffic). In the city you need autonomous parking unless you want to waste precious time … Read More





ASML – In Line Qtr but big bookings – Logic Strong! Memory ? EUV?
ASML in line QTR with big Orders
Near term slippage w long term upside
Logic is strong but memory recovery unknown
EUV is finally a reality/commercialized
In line quarter- supplier slippage expected in Q4
Results were revenues of Euro 3B and EPS of Euro 1.49, more or less in line with earnings estimate if a tad bit light in revenue. … Read More
TSMC – Solid Q3 Beat Guide- 5G Driver – Big Capex Bump – Flawless Execution
TSMC puts up solid QTR, Capex increase for 5NM and capacity increase, 5G/mobile remains driver- HPC good 7NM, 27% of revs- Very nice margins!
In line quarter-Good guide
TSMC reported revenues of $9.4B and EPS of $0.62 , more or less in line with expectations, perhaps a touch below ” whisper” expectations which had been… Read More
The New Silvaco CEO is SURGING!
One of my great pleasures in the semiconductor industry is meeting the people who have brought us to where we are today, at the forefront of modern life. One of those people is Babak Taheri, now CEO of Silvaco who I spent time with yesterday. Babak started in semiconductors around the same time I did 30+ years ago. He has a PhD in EECS and… Read More
The SiFive Tech Symposiums are Heading To Portland and Seattle Next Week!
We’re confirming seats in Portland and Seattle for the Pacific Northwest leg of our worldwide 2019 SiFive Tech Symposiums. We are pleased to have Mentor, A Siemens Business as our co-host, and Lauterbach, a leader in microprocessor development tools, as our partner in both cities. The Portland symposium will take place Tuesday,… Read More
eSilicon White Paper on Chiplets – Good Read
eSilicon recently released a paper detailing its experiences and its thoughts on the future of chiplets. The author of the white paper is Dr. Carlos Macián. I have also covered a presentation given by Carlos recently at the AI Hardware Summit, and he is well-spoken and quite knowledgeable. To get the white paper, go to the eSilicon… Read More
Virtualizing 5G Infrastructure Verification
Mentor have pushed the advantages of virtualized verification in a number of domains, initially in verifying advanced networking devices supporting multiple protocols and software-defined networking (SDN), and more recently for SSD controllers, particularly in large storage systems for data centers. There are two important… Read More
Optimizing High Performance Packages calls for Multidisciplinary 3D Modeling
For all the time we spend thinking and talking about silicon design, it’s easy to forget just how important package design is. Semiconductor packages have evolved over the years from very basic containers for ICs into very specialized and highly engineered elements of finished electronic systems. They play an important role … Read More
Automating Timing Arc Prediction for AMS IP using ML
NVIDIA designs some of the most complex chips for GPU and AI applications these days, with SoCs exceeding 21 billion transistors. They certainly know how to push the limits of all EDA tools, and they have a strong motivation to automate more manual tasks in order to quicken their time to market. I missed their Designer/IP Track Poster… Read More
Cadence and Green Hills Share More Security Thoughts at ARM Techcon
On Wednesday, October 9, 2019, I had the pleasure of spending the day at ARM Techcon at the San Jose Convention Center. In the morning, in addition to getting some sneak peeks into the exhibitor area, I attended some of the morning keynote presentations, which focused on artificial intelligence (AI) and machine learning (ML) topics.… Read More
Weebit Nano Moves into the Mainstream with Customer Adoption