Moore’s Law has been about device density, specifically transistor density, increasing every certain number of years. Although cost is the most easily grasped advantage, there are two other benefits: higher performance (speed) and reduced power. When these benefits are compromised, they can also pose a scaling limitation.





The Largest Engineering Simulation Virtual Event in the World!
ANSYS is the world leader in engineering simulation across multiple markets. One of those markets just happens to be semiconductor which is why ANSYS is on SemiWiki.com. Due to the pandemic ANSYS has transformed their popular live regional events to one broad virtual event “Simulation World”.
“Simulation World is world’s largest… Read More
Synopsys Announces IP Supporting 5G’s Game Changing Low Power IoT Spec
If you are like me, you will get a 5G phone because of the high bandwidth it offers. However, there is a lot more to 5G than just fast data. In fact, one of the appealing features of 5G is low bandwidth communication. This is useful for edge devices that perform infrequent and low volume data transfers and depend on long battery life. Prior… Read More
Talking Sense With Moortec…See No Evil!
In the first of this blog trilogy, Talking Sense with Moortec…’Are you listening’, I looked at not waiting for hindsight to be wise after the event, instead make use of what’s available and act ahead of time.
There’s a Japanese maxim, depicting three ‘wise’ monkeys… Kikazaru, Mizaru, and Iwazaru, better known as ‘hear no evil, … Read More
Atos Crafts NoC, Pad Ring, More Using Defacto
I’ve talked before about how Defacto provides a platform for scripted RTL assembly. Kind of a rethink of the IP-XACT concept but without need to get into XML (it works directly with SV), and with a more relaxed approach in which you decide what you want to automate and how you want to script it.
They’re hosting a webinar on May 28th 10-11am… Read More
A Thoughtful Semiconductor Outlook – Needed Now More Than Ever
If you’re not dizzy from all the changing market projections lately, you soon will be. At times like this, I believe it’s important to keep perspective and look beyond the next 24-hour news cycle to try and understand what the future holds. I’m happy to report there’s a great event coming up in June that will do just that.
The Silicon… Read More
Collaboration Flow for Moore’s Law versus More than Moore
The current Coronavirus crisis is inflicting a lot of pain on people, companies, and governments. I hope I am not getting in trouble with my reasoning, but if you look closely, there are also some “positives” to the Covid-19 crisis.
– It is stress-testing our infrastructure and telling us where we need to improve – as country,… Read More
eFPGA – What’s Available Now, What’s Coming and What’s Possible!
eFPGA is now widely available, has been used in dozens of chips, is being designed into dozens more and it has an increasing list of benefits for a range of applications. Embedded FPGA, or eFPGA, enables your SoC to have flexibility in critical areas where algorithm, protocol or market needs are changing. FPGAs can also accelerate… Read More
Cost Analysis of the Proposed TSMC US Fab
On May 15th TSMC “announced its intention to build and operate an advanced semiconductor fab in the United States with the mutual understanding and commitment to support from the U.S. federal government and the State of Arizona.”
The fab will run TSMC’s 5nm technology and have a capacity of 20,000 wafers per month (wpm). Construction… Read More
Is Mutation Testing Worth the Effort? Innovation in Verification
Mutation testing is an intriguing idea, but is it useful? Paul Cunningham (GM of Verification at Cadence), Jim Hogan and I continue our series on novel research ideas, here looking at a paper examining the pros and cons of this topic. Feel free to comment if you agree or disagree.
The Innovation
This month’s pick is Which Software … Read More
Weebit Nano Moves into the Mainstream with Customer Adoption