Have per-die EUV costs on any node went below that of immersion litho node?

[Paul2]

Have per-die EUV costs on any node went below that of immersion litho node?

Will EUV nodes be permanently non-competitive on per die-cost vs. mature immersion nodes in 10nm-7nm range?

 

[Fred Chen]

The trend has been wafer cost up, yield down, SRAM doesn't scale, gate pitch hasn't scaled well either. I think track pitch is starting to slow down as well now as approaching 20 nm.

For DRAM, smaller capacitors need to be relatively taller, otherwise they become swamped by parasitic capacitances (bit line et al.). That will be hard to do with thinner EUV resist.